{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9785551","patent":{"patent_number":"US-9785551","title":"Memory access method, buffer scheduler and memory module","assignee":null,"inventors":[],"filing_date":"2015-11-28T00:00:00.000Z","publication_date":"2017-10-10T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G06F"],"num_claims":12,"abstract":"The present invention discloses a memory access method, a buffer scheduler, and a memory module, which can support multiple application scenarios without changing the memory module or a memory chip. The method includes: receiving an operation request message for memory access data, where the operation request message includes tag information of the memory access data, operation information of the memory access data, and a memory address of the memory access data; and performing, according to at least one of the tag information of the memory access data, a memory address of the memory access data, and the operation information of the memory access data, an operation on the tag of the memory access data and/or the memory access data stored in the memory module. The present invention is applicable to the computer field."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Memory access method, buffer scheduler and memory module","description":"The present invention discloses a memory access method, a buffer scheduler, and a memory module, which can support multiple application scenarios without changing the memory module or a memory chip. T","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9785551","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9785551","citation_suggestion":"Patentable. \"Memory access method, buffer scheduler and memory module\" (US-9785551). https://patentable.app/patents/US-9785551","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9785551","json":"https://patentable.app/api/llm-context/US-9785551","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T05:38:35.139Z"}