{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9786348","patent":{"patent_number":"US-9786348","title":"Dynamic adjustment of memory cell digit line capacitance","assignee":null,"inventors":[],"filing_date":"2016-04-11T00:00:00.000Z","publication_date":"2017-10-10T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C","G11C"],"num_claims":19,"abstract":"Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. A ferroelectric memory cell may be used to store a logic state. The capacitance of a digit line of the ferroelectric memory cell may be dynamically increased prior to, and during a portion of, a read operation used to determine a stored logic state of the cell. The capacitance may be increased by leveraging intrinsic capacitance of digit lines of the array—e.g., by shorting one digit line to another digit line. Increasing the capacitance of the digit line may increase the signal on the digit line that is sensed during the read operation."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Dynamic adjustment of memory cell digit line capacitance","description":"Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. A ferroelectric memory cell may be used to store a logic state. The capacitance of a digit line of the f","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9786348","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9786348","citation_suggestion":"Patentable. \"Dynamic adjustment of memory cell digit line capacitance\" (US-9786348). https://patentable.app/patents/US-9786348","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9786348","json":"https://patentable.app/api/llm-context/US-9786348","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T06:37:23.962Z"}