{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9786563","patent":{"patent_number":"US-9786563","title":"Fin pitch scaling for high voltage devices and low voltage devices on the same wafer","assignee":null,"inventors":[],"filing_date":"2015-11-23T00:00:00.000Z","publication_date":"2017-10-10T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L"],"num_claims":8,"abstract":"A semiconductor device is provided that includes a first plurality of fin structures having a first width in a first region of a substrate, and a second plurality of fin structures having a second width in a second region of the substrate, the second width being less than the first width. A first gate structure is formed on the first plurality of fin structures including a first high-k gate dielectric that is in direct contact with a channel region of the first plurality of fin structures and a first gate conductor. A second gate structure is formed on the second plurality of fin structures including a high voltage gate dielectric that is in direct contact with a channel region of the second plurality of fin structures, a second high-k gate dielectric and a second gate conductor."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Fin pitch scaling for high voltage devices and low voltage devices on the same wafer","description":"A semiconductor device is provided that includes a first plurality of fin structures having a first width in a first region of a substrate, and a second plurality of fin structures having a second wid","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9786563","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9786563","citation_suggestion":"Patentable. \"Fin pitch scaling for high voltage devices and low voltage devices on the same wafer\" (US-9786563). https://patentable.app/patents/US-9786563","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9786563","json":"https://patentable.app/api/llm-context/US-9786563","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T08:19:53.569Z"}