{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9786664","patent":{"patent_number":"US-9786664","title":"Fabricating a dual gate stack of a CMOS structure","assignee":null,"inventors":[],"filing_date":"2016-02-10T00:00:00.000Z","publication_date":"2017-10-10T00:00:00.000Z","cpc_codes":["H01L"],"num_claims":16,"abstract":"A dual gate CMOS structure including a semiconductor substrate; a first channel structure including a first semiconductor material and a second channel structure including a second semiconductor material on the substrate. The first semiconductor material including SixGe1-x where x=0 to 1 and the second semiconductor material including a group III-V compound material. A first gate stack on the first channel structure includes: a first native oxide layer as an interface control layer, the first native oxide layer comprising an oxide of the first semiconductor material; a first high-k dielectric layer; a first metal gate layer. A second gate stack on the second channel structure includes a second high-k dielectric layer; a second metal gate layer. The interface between the second channel structure and the second high-k dielectric layer is free of any native oxides of the second semiconductor material."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Fabricating a dual gate stack of a CMOS structure","description":"A dual gate CMOS structure including a semiconductor substrate; a first channel structure including a first semiconductor material and a second channel structure including a second semiconductor mater","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9786664","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9786664","citation_suggestion":"Patentable. \"Fabricating a dual gate stack of a CMOS structure\" (US-9786664). https://patentable.app/patents/US-9786664","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9786664","json":"https://patentable.app/api/llm-context/US-9786664","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T09:19:10.292Z"}