{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9792116","patent":{"patent_number":"US-9792116","title":"Computer processor that implements pre-translation of virtual addresses with target registers","assignee":null,"inventors":[],"filing_date":"2016-03-31T00:00:00.000Z","publication_date":"2017-10-17T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F"],"num_claims":46,"abstract":"A computer processor that implements pre-translation of virtual addresses with target registers is disclosed. The computer processor may include a register file comprising one or more registers. The computer processor may include processing logic. The processing logic may receive a value to store in a register of one or more registers. The processing logic may store the value in the register. The processing logic may designate the received value as a virtual instruction address, the virtual instruction address having a corresponding virtual base page number. The processing logic may translate the virtual base page number to a corresponding real base page number and zero or more real page numbers corresponding to zero or more virtual page numbers adjacent to the virtual base page number. The processing logic may further store in the register of the one or more registers the real base page number and the zero or more real page numbers."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Computer processor that implements pre-translation of virtual addresses with target registers","description":"A computer processor that implements pre-translation of virtual addresses with target registers is disclosed. The computer processor may include a register file comprising one or more registers. The c","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9792116","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9792116","citation_suggestion":"Patentable. \"Computer processor that implements pre-translation of virtual addresses with target registers\" (US-9792116). https://patentable.app/patents/US-9792116","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9792116","json":"https://patentable.app/api/llm-context/US-9792116","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T04:56:24.797Z"}