{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9792977","patent":{"patent_number":"US-9792977","title":"Volatile memory erasure by manipulating reference voltage of the memory","assignee":null,"inventors":[],"filing_date":"2015-04-06T00:00:00.000Z","publication_date":"2017-10-17T00:00:00.000Z","cpc_codes":["G11C","G06F","G06F","G11C"],"num_claims":32,"abstract":"The present invention provides an erasure circuitry, a method for erasing a volatile memory, a volatile memory and erasure module in the form of computer readable instructions, where the erasure circuitry is adapted to erase the memory at occurrence of a predefined event. The erasure circuitry includes a negative pulse generator which is adapted to reduce the charge on capacitor in one or more volatile memory cells to zero logic by using a switch connected to the Voltage Reference (Vref) of the volatile memory cell, a controller and a negative power supply. The switch and the negative power supply impose a negative pulse on the Vref of the volatile memory cells on being instructed by the controller at the occurrence of a predefined event. An erasure module associated with the controller is provided for instructing the erasure circuitry for erasing data at the occurrence of a predefined event."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Volatile memory erasure by manipulating reference voltage of the memory","description":"The present invention provides an erasure circuitry, a method for erasing a volatile memory, a volatile memory and erasure module in the form of computer readable instructions, where the erasure circu","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9792977","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9792977","citation_suggestion":"Patentable. \"Volatile memory erasure by manipulating reference voltage of the memory\" (US-9792977). https://patentable.app/patents/US-9792977","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9792977","json":"https://patentable.app/api/llm-context/US-9792977","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T15:37:40.062Z"}