{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9792980","patent":{"patent_number":"US-9792980","title":"Three dimensional resistive memory architectures","assignee":null,"inventors":[],"filing_date":"2013-10-31T00:00:00.000Z","publication_date":"2017-10-17T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C"],"num_claims":11,"abstract":"In one example, a three dimensional resistive memory architecture includes adjacent memory tiles with each tile including a multilevel resistive crossbar array and at least one decoder. The multilevel crossbar array includes layers of row crossbars, layers of column crossbars, and layers of resistive memory elements interposed between cross points of the row crossbars and the column crossbars, in which at least one layer of crossbars extends from a first tile through an adjacent tile and is used to address resistive memory elements in the adjacent tile. The at least one decoder underlies the multilevel resistive crossbar array and includes an address matrix comprising digital lines and analog lines, in which the digital lines select which crossbars are connected to the analog lines."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Three dimensional resistive memory architectures","description":"In one example, a three dimensional resistive memory architecture includes adjacent memory tiles with each tile including a multilevel resistive crossbar array and at least one decoder. The multilevel","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9792980","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9792980","citation_suggestion":"Patentable. \"Three dimensional resistive memory architectures\" (US-9792980). https://patentable.app/patents/US-9792980","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9792980","json":"https://patentable.app/api/llm-context/US-9792980","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T06:45:59.682Z"}