{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9799626","patent":{"patent_number":"US-9799626","title":"Semiconductor packages and other circuit modules with porous and non-porous stabilizing layers","assignee":null,"inventors":[],"filing_date":"2015-09-14T00:00:00.000Z","publication_date":"2017-10-24T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":19,"abstract":"Integrated circuits (ICs 110) are attached to a wafer (120W). A stabilization layer (404) is formed over the wafer to strengthen the structure for further processing. Unlike a conventional mold compound, the stabilization layer is separated from at least some wafer areas around the ICs by one or more gap regions (450) to reduce the thermo-mechanical stress on the wafer and hence the wafer warpage. Alternatively or in addition, the stabilization layer can be a porous material having a low horizontal elastic modulus to reduce the wafer warpage, but having a high flexural modulus to reduce warpage and otherwise strengthen the structure for further processing. Other features and advantages are also provided."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Semiconductor packages and other circuit modules with porous and non-porous stabilizing layers","description":"Integrated circuits (ICs 110) are attached to a wafer (120W). A stabilization layer (404) is formed over the wafer to strengthen the structure for further processing. Unlike a conventional mold compou","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9799626","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9799626","citation_suggestion":"Patentable. \"Semiconductor packages and other circuit modules with porous and non-porous stabilizing layers\" (US-9799626). https://patentable.app/patents/US-9799626","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9799626","json":"https://patentable.app/api/llm-context/US-9799626","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T09:32:11.162Z"}