{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9800232","patent":{"patent_number":"US-9800232","title":"Stitchable global clock for 3D chips","assignee":null,"inventors":[],"filing_date":"2016-03-30T00:00:00.000Z","publication_date":"2017-10-24T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G06F"],"num_claims":20,"abstract":"A method for providing a stitchable clock mesh, a dual operation mode system, and a method for providing a master clock stratum are, in turn, provided for a 3D chip stack having two or more strata. The method for providing a stitchable clock mesh includes providing, by at least one clock mesh disposed on each stratum and having multiple sectors, a global clock signal to various chip locations. The method further includes collecting, by mesh data sensors on each stratum, mesh data for the at least one mesh. The mesh data includes measured functional data and measured performance data for a current system configuration. The method also includes selectively performing, by joining circuitry, a segmentation operation or a joining operation on the least one mesh or one or more portions thereof responsive to the mesh data and the current system configuration selectable from a plurality of system target configurations."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Stitchable global clock for 3D chips","description":"A method for providing a stitchable clock mesh, a dual operation mode system, and a method for providing a master clock stratum are, in turn, provided for a 3D chip stack having two or more strata. Th","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9800232","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9800232","citation_suggestion":"Patentable. \"Stitchable global clock for 3D chips\" (US-9800232). https://patentable.app/patents/US-9800232","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9800232","json":"https://patentable.app/api/llm-context/US-9800232","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T04:33:08.204Z"}