{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9804974","patent":{"patent_number":"US-9804974","title":"Memory circuit using dynamic random access memory arrays","assignee":null,"inventors":[],"filing_date":"2015-12-03T00:00:00.000Z","publication_date":"2017-10-31T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G06F","G06F","G11C","G11C","G11C","G11C","H04L","H04L","G06F","G11C","G11C"],"num_claims":7,"abstract":"A memory circuit using dynamic random access memory (DRAM) arrays. The DRAM arrays can be configured as CAMs or RAMs on the same die, with the control circuitry for performing comparisons located outside of the DRAM arrays. In addition, DRAM arrays can be configured for secure authentication where, after the first authentication performed with a non-volatile secure element, subsequent authentications can be performed by the DRAM array. Input patterns can be loaded into a DRAM array by loading logic state ones (“1”) into each of the plurality of input data bit lines in each of the columns in the DRAM array and shunting one or more of the plurality of input data bit lines in the DRAM array corresponding to logic state zeroes (“0”) in the input pattern."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Memory circuit using dynamic random access memory arrays","description":"A memory circuit using dynamic random access memory (DRAM) arrays. The DRAM arrays can be configured as CAMs or RAMs on the same die, with the control circuitry for performing comparisons located outs","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9804974","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9804974","citation_suggestion":"Patentable. \"Memory circuit using dynamic random access memory arrays\" (US-9804974). https://patentable.app/patents/US-9804974","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9804974","json":"https://patentable.app/api/llm-context/US-9804974","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T09:24:19.962Z"}