{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9804978","patent":{"patent_number":"US-9804978","title":"Memory system facilitating high bandwidth and high capacity memory","assignee":null,"inventors":[],"filing_date":"2015-03-30T00:00:00.000Z","publication_date":"2017-10-31T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F"],"num_claims":22,"abstract":"A memory device and memory system using the memory device. The memory system includes a memory controller having a memory bus with a plurality of lanes, and a plurality of memory devices. Each memory device has a plurality of data pins and a plurality of detection circuits, wherein each detection circuit is coupled to one of the data pins to detect whether the data pin is coupled to one of the lanes of the memory bus. Each lane of the memory bus provides a point-to-point connection between the memory controller and exactly one of the device data lanes, wherein a subset of the data lanes of each memory device are coupled to one of the lanes of the memory bus. The memory capacity of a memory system may be increased by using more of the memory devices limited only by the width of the memory bus."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Memory system facilitating high bandwidth and high capacity memory","description":"A memory device and memory system using the memory device. The memory system includes a memory controller having a memory bus with a plurality of lanes, and a plurality of memory devices. Each memory ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9804978","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9804978","citation_suggestion":"Patentable. \"Memory system facilitating high bandwidth and high capacity memory\" (US-9804978). https://patentable.app/patents/US-9804978","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9804978","json":"https://patentable.app/api/llm-context/US-9804978","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T09:21:45.952Z"}