{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9806152","patent":{"patent_number":"US-9806152","title":"Vertical insulated gate turn-off thyristor with intermediate p+ layer in p-base","assignee":null,"inventors":[],"filing_date":"2017-03-02T00:00:00.000Z","publication_date":"2017-10-31T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L"],"num_claims":15,"abstract":"An insulated gate turn-off thyristor has a layered structure including a p+ layer (e.g., a substrate), an n-epi layer, a p-well, vertical insulated gate regions formed in the p-well, and an n-layer over the p-well and between the gate regions, so that vertical npn and pnp transistors are formed. The p-well has an intermediate highly doped portion. When the gate regions are sufficiently biased, an inversion layer surrounds the gate regions, causing the effective base of the npn transistor to be narrowed to increase its beta. When the product of the betas exceeds one, controlled latch-up of the thyristor is initiated. The p-well's highly doped intermediate region enables improvement in the npn transistor efficiency as well as enabling more independent control over the characteristics of the n-type layer (emitter), the emitter-base junction characteristics, and the overall dopant concentration and thickness of the p-type base."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Vertical insulated gate turn-off thyristor with intermediate p+ layer in p-base","description":"An insulated gate turn-off thyristor has a layered structure including a p+ layer (e.g., a substrate), an n-epi layer, a p-well, vertical insulated gate regions formed in the p-well, and an n-layer ov","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9806152","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9806152","citation_suggestion":"Patentable. \"Vertical insulated gate turn-off thyristor with intermediate p+ layer in p-base\" (US-9806152). https://patentable.app/patents/US-9806152","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9806152","json":"https://patentable.app/api/llm-context/US-9806152","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T19:27:06.669Z"}