{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9811419","patent":{"patent_number":"US-9811419","title":"Validation bits and offsets to represent logical pages split between data containers","assignee":null,"inventors":[],"filing_date":"2017-01-18T00:00:00.000Z","publication_date":"2017-11-07T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G06F","G11C","G06F"],"num_claims":1,"abstract":"A flash memory codeword architecture is provided. A non-integer count of logical pages is packed into a codeword payload data container. A codeword payload header is generated. The codeword payload header includes an offset to a first logical page that is packed, at least in part, into the codeword payload data container. The codeword payload data container and the codeword payload header are concatenated to generate a codeword payload. Error-correcting code data is generated based, at least in part, on the codeword payload using a systematic error-correcting code. The codeword payload and error-correcting code data is concatenated to generate a codeword. A physical page is programmed with the codeword."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Validation bits and offsets to represent logical pages split between data containers","description":"A flash memory codeword architecture is provided. A non-integer count of logical pages is packed into a codeword payload data container. A codeword payload header is generated. The codeword payload he","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9811419","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9811419","citation_suggestion":"Patentable. \"Validation bits and offsets to represent logical pages split between data containers\" (US-9811419). https://patentable.app/patents/US-9811419","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9811419","json":"https://patentable.app/api/llm-context/US-9811419","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T11:20:27.883Z"}