{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9812187","patent":{"patent_number":"US-9812187","title":"Termination topology of memory system and associated memory module and control method","assignee":null,"inventors":[],"filing_date":"2017-02-05T00:00:00.000Z","publication_date":"2017-11-07T00:00:00.000Z","cpc_codes":["G11C","G06F","G11C","G11C","G11C","G11C","H04L","G11C","G11C","G11C","G11C","G11C"],"num_claims":20,"abstract":"A memory system includes a memory controller and a memory module. The memory controller is arranged for selectively generating at least a clock signal and an inverted clock signal. The memory module includes a first termination resistor, a second termination resistor and a switch module, where a first node of the first termination resistor is to receive the clock signal, a second termination resistor, wherein a first node of the second termination resistor is to receive the inverted clock signal, and the switch module is arranged for selectively connecting or disconnecting a second node of the second termination resistor to a second node of the first termination resistor."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Termination topology of memory system and associated memory module and control method","description":"A memory system includes a memory controller and a memory module. The memory controller is arranged for selectively generating at least a clock signal and an inverted clock signal. The memory module i","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9812187","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9812187","citation_suggestion":"Patentable. \"Termination topology of memory system and associated memory module and control method\" (US-9812187). https://patentable.app/patents/US-9812187","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9812187","json":"https://patentable.app/api/llm-context/US-9812187","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T11:22:50.461Z"}