{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9817058","patent":{"patent_number":"US-9817058","title":"Addressable test circuit and test method for key parameters of transistors","assignee":null,"inventors":[],"filing_date":"2016-11-14T00:00:00.000Z","publication_date":"2017-11-14T00:00:00.000Z","cpc_codes":["G11C","H01L","G11C","G11C","H01L"],"num_claims":19,"abstract":"An addressable test circuit is configured to test parameters of a plurality of transistors. The addressable test circuit includes combination logic circuits including a plurality of gate circuits and are configured to select a device under test, a plurality of PADs, a plurality of address bus and data bus; wherein six or more of the data buses are test signal lines. A test method can employ the above address test circuit for testing parameters of a plurality of transistors, where the subthreshold leakage current Ioff and saturation current Idsat are measured in different signal lines respectively to ensure the accurate measurement of the two parameters in one circuit."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Addressable test circuit and test method for key parameters of transistors","description":"An addressable test circuit is configured to test parameters of a plurality of transistors. The addressable test circuit includes combination logic circuits including a plurality of gate circuits and ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9817058","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9817058","citation_suggestion":"Patentable. \"Addressable test circuit and test method for key parameters of transistors\" (US-9817058). https://patentable.app/patents/US-9817058","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9817058","json":"https://patentable.app/api/llm-context/US-9817058","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T12:04:12.068Z"}