{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9817927","patent":{"patent_number":"US-9817927","title":"Hard mask etch and dielectric etch aware overlap for via and metal layers","assignee":null,"inventors":[],"filing_date":"2015-08-31T00:00:00.000Z","publication_date":"2017-11-14T00:00:00.000Z","cpc_codes":["G06F","G06F"],"num_claims":20,"abstract":"A method and apparatus for generating a final dielectric etch compensation table and a final hard mask etch compensation table for either OPC or MPC process flows are provided. Embodiments include performing an overlap pattern classification on a wafer; calibrating a dielectric etch bias or a hard mask etch bias based on the pattern classification; comparing either a CD overlap of a via layer with a metal layer and a CD overlap of the via layer with a lower connecting metal layer or a CD overlap of the metal layer with an upper connecting via layer and a CD overlap of the metal layer with the via layer against a criteria; outputting final dielectric etch compensation and hard mask etch compensation tables to either OPC or MPC process flows; and repeating the steps of calibrating, comparing, and outputting for either the via layer or metal layer remaining."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Hard mask etch and dielectric etch aware overlap for via and metal layers","description":"A method and apparatus for generating a final dielectric etch compensation table and a final hard mask etch compensation table for either OPC or MPC process flows are provided. Embodiments include per","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9817927","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9817927","citation_suggestion":"Patentable. \"Hard mask etch and dielectric etch aware overlap for via and metal layers\" (US-9817927). https://patentable.app/patents/US-9817927","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9817927","json":"https://patentable.app/api/llm-context/US-9817927","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T12:04:29.384Z"}