{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9818712","patent":{"patent_number":"US-9818712","title":"Package with low stress region for an electronic component","assignee":null,"inventors":[],"filing_date":"2015-01-14T00:00:00.000Z","publication_date":"2017-11-14T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":15,"abstract":"A device package includes a substrate having an active surface. Electrical connection bumps are deposited on the active surface and are arranged in an array having a perimeter. At least one electronic component is formed at a region of the active surface, where the region is located outside of the perimeter of the array of electrical connection bumps. When the device package is coupled with external circuitry via the electrical connection bumps, the region at which the electronic component is formed is suspended over the electronic circuitry. This region is subject to a lower stress profile than a region of the active surface circumscribed by the perimeter. Thus, stress sensitive electronic components can be located in this lower stress region of the active surface."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Package with low stress region for an electronic component","description":"A device package includes a substrate having an active surface. Electrical connection bumps are deposited on the active surface and are arranged in an array having a perimeter. At least one electronic","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9818712","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9818712","citation_suggestion":"Patentable. \"Package with low stress region for an electronic component\" (US-9818712). https://patentable.app/patents/US-9818712","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9818712","json":"https://patentable.app/api/llm-context/US-9818712","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T07:48:20.472Z"}