{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9820389","patent":{"patent_number":"US-9820389","title":"Partially depopulated interconnection arrays for packaged semiconductor devices and printed circuit boards","assignee":null,"inventors":[],"filing_date":"2016-04-28T00:00:00.000Z","publication_date":"2017-11-14T00:00:00.000Z","cpc_codes":["G06F","H01L","H01L","H01L","H01L"],"num_claims":17,"abstract":"In one embodiment, a ball grid array (BGA) of a packaged semiconductor device and a corresponding landing pad array of a printed circuit board each have a layout defined by an interconnection array having (i) an inner sub-array of locations having connectors arranged in rows and columns separated by a specified pitch and (ii) an outer rectangular ring of locations having connectors arranged in rows and columns separated by the specified pitch. The outer rectangular ring is separated from the inner sub-array by a depopulated rectangular ring having a width of at least twice the specified pitch, wherein the depopulated rectangular ring has no connectors. The outer rectangular ring has empty locations having no connectors. Some of those empty locations define depopulated sets that divide the outer rectangular ring into a number of different contiguous sets of locations having connectors that enable pin escape for connectors of the device's BGA."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Partially depopulated interconnection arrays for packaged semiconductor devices and printed circuit boards","description":"In one embodiment, a ball grid array (BGA) of a packaged semiconductor device and a corresponding landing pad array of a printed circuit board each have a layout defined by an interconnection array ha","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9820389","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9820389","citation_suggestion":"Patentable. \"Partially depopulated interconnection arrays for packaged semiconductor devices and printed circuit boards\" (US-9820389). https://patentable.app/patents/US-9820389","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9820389","json":"https://patentable.app/api/llm-context/US-9820389","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T15:05:56.403Z"}