{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9823925","patent":{"patent_number":"US-9823925","title":"Instruction and logic for a logical move in an out-of-order processor","assignee":null,"inventors":[],"filing_date":"2014-03-28T00:00:00.000Z","publication_date":"2017-11-21T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G06F","G06F"],"num_claims":20,"abstract":"A processor includes allocation unit with logic to receive a logical move instruction. The logical move instruction includes a source logical register as a source parameter and a destination logical register as a destination parameter. The source logical register is assigned to a source physical register and the destination logical register is assigned to a destination physical register. The allocation unit includes logic to assign a first value of the source logical register to the destination logical register and to maintain a second value of the destination physical register before and after the assignment of the first value to the destination logical register."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Instruction and logic for a logical move in an out-of-order processor","description":"A processor includes allocation unit with logic to receive a logical move instruction. The logical move instruction includes a source logical register as a source parameter and a destination logical r","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9823925","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9823925","citation_suggestion":"Patentable. \"Instruction and logic for a logical move in an out-of-order processor\" (US-9823925). https://patentable.app/patents/US-9823925","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9823925","json":"https://patentable.app/api/llm-context/US-9823925","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T09:28:18.158Z"}