{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9823964","patent":{"patent_number":"US-9823964","title":"Method for memory scrub of DRAM with internal error correcting code (ECC) bits during either memory activate and/or precharge operation","assignee":null,"inventors":[],"filing_date":"2015-12-08T00:00:00.000Z","publication_date":"2017-11-21T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G06F","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C"],"num_claims":20,"abstract":"A method for updating a DRAM memory array is disclosed. The method comprises: a) receiving a command from a memory controller to initiate an active cycle for activating a memory row in a DRAM memory array; b) performing an Error Correction Code (ECC) scrub on the memory row prior to reading data from the memory row into sense amplifiers in the DRAM memory array in accordance with the command to activate; c) activating the memory row; and d) writing corrected data following the ECC scrub back into memory from the sense amplifiers during a pre-charge cycle of the DRAM memory array."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Method for memory scrub of DRAM with internal error correcting code (ECC) bits during either memory activate and/or precharge operation","description":"A method for updating a DRAM memory array is disclosed. The method comprises: a) receiving a command from a memory controller to initiate an active cycle for activating a memory row in a DRAM memory a","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9823964","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9823964","citation_suggestion":"Patentable. \"Method for memory scrub of DRAM with internal error correcting code (ECC) bits during either memory activate and/or precharge operation\" (US-9823964). https://patentable.app/patents/US-9823964","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9823964","json":"https://patentable.app/api/llm-context/US-9823964","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T09:15:23.567Z"}