{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9824008","patent":{"patent_number":"US-9824008","title":"Cache memory sharing in a multi-core processor (MCP)","assignee":null,"inventors":[],"filing_date":"2008-11-21T00:00:00.000Z","publication_date":"2017-11-21T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F"],"num_claims":20,"abstract":"This invention describes an apparatus, computer architecture, memory structure, memory control, and cache memory operation method for multi-core processor. A logic core shares requests when faced with immediate cache memory units having low yield or deadly performance. The core mounts (multiple) cache unit(s) that might already be in use by other logic cores. Selected cache memory units serve multiple logic cores with the same contents. The shared cache memory unit(s) serves all the mounting cores with cache search, hit, miss, and write back functions. The method recovers a logic core whose cache memory block is not operational by sharing cache memory blocks which might already engage other logic cores. The method is used to improve reliability and performance of the remaining system."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Cache memory sharing in a multi-core processor (MCP)","description":"This invention describes an apparatus, computer architecture, memory structure, memory control, and cache memory operation method for multi-core processor. A logic core shares requests when faced with","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9824008","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9824008","citation_suggestion":"Patentable. \"Cache memory sharing in a multi-core processor (MCP)\" (US-9824008). https://patentable.app/patents/US-9824008","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9824008","json":"https://patentable.app/api/llm-context/US-9824008","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T06:07:27.793Z"}