{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9830152","patent":{"patent_number":"US-9830152","title":"Selective storing of previously decoded instructions of frequently-called instruction sequences in an instruction sequence buffer to be executed by a processor","assignee":null,"inventors":[],"filing_date":"2015-12-22T00:00:00.000Z","publication_date":"2017-11-28T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F"],"num_claims":30,"abstract":"Selective storing of previously decoded instructions of frequently-called instruction sequences in an instruction sequence buffer to be executed by a processor is disclosed. In one aspect, a selective instruction sequence buffer controller is configured to selectively store previously decoded instructions for an instruction sequence by determining if a received instruction address corresponds to an instruction sequence captured in an instruction sequence buffer. If the received instruction address corresponds to a captured instruction sequence, the selective instruction sequence buffer controller provides corresponding micro-operations stored in the instruction sequence buffer for execution. If the received instruction address does not correspond to the captured instruction sequence, the selective instruction sequence buffer controller reduces a frequency indicator of the instruction sequence. The selective instruction sequence buffer controller may also increase the frequency indicator of the instruction sequence when the instruction sequence is accessed, capturing the instruction sequence once the frequency indicator meets a threshold."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Selective storing of previously decoded instructions of frequently-called instruction sequences in an instruction sequence buffer to be executed by a processor","description":"Selective storing of previously decoded instructions of frequently-called instruction sequences in an instruction sequence buffer to be executed by a processor is disclosed. In one aspect, a selective","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9830152","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9830152","citation_suggestion":"Patentable. \"Selective storing of previously decoded instructions of frequently-called instruction sequences in an instruction sequence buffer to be executed by a processor\" (US-9830152). https://patentable.app/patents/US-9830152","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9830152","json":"https://patentable.app/api/llm-context/US-9830152","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T08:01:54.725Z"}