{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9830187","patent":{"patent_number":"US-9830187","title":"Scheduler and CPU performance controller cooperation","assignee":null,"inventors":[],"filing_date":"2015-06-05T00:00:00.000Z","publication_date":"2017-11-28T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F"],"num_claims":43,"abstract":"In one embodiment, an application programming interface (API) is defined that enables a thread scheduler to communicate thread information to the CPU performance controller when dispatching a thread to a processor or processor core. When dispatching a thread, the scheduler may communicate thread information including thread state information, a general “importance” of the thread as defined by a priority level and/or quality of service (QoS) classification, a measurement of the scheduler dispatch latency for the thread, or architectural information regarding the instructions within the thread, such as whether the thread is contains 64-bit or 32-bit instructions. The performance controller can use the information provided by the scheduler to make performance control decisions for the processor cores within the system."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Scheduler and CPU performance controller cooperation","description":"In one embodiment, an application programming interface (API) is defined that enables a thread scheduler to communicate thread information to the CPU performance controller when dispatching a thread t","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9830187","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9830187","citation_suggestion":"Patentable. \"Scheduler and CPU performance controller cooperation\" (US-9830187). https://patentable.app/patents/US-9830187","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9830187","json":"https://patentable.app/api/llm-context/US-9830187","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T10:15:19.916Z"}