{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9836414","patent":{"patent_number":"US-9836414","title":"Apparatus and method for hardware-based secure data processing using buffer memory address range rules","assignee":null,"inventors":[],"filing_date":"2014-12-16T00:00:00.000Z","publication_date":"2017-12-05T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G06F"],"num_claims":18,"abstract":"A processor for processing data from a buffer memory, implemented in hardware, may allow writing of output data, processed based on input data from at least one secure location associated with a secure address range of the buffer memory, to one or more secure locations associated with the secure address range. Further, the processor may block writing of output data, processed based on input data from at least one secure location associated with the secure address range, to one or more insecure locations associated with an insecure address range of the buffer memory."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Apparatus and method for hardware-based secure data processing using buffer memory address range rules","description":"A processor for processing data from a buffer memory, implemented in hardware, may allow writing of output data, processed based on input data from at least one secure location associated with a secur","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9836414","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9836414","citation_suggestion":"Patentable. \"Apparatus and method for hardware-based secure data processing using buffer memory address range rules\" (US-9836414). https://patentable.app/patents/US-9836414","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9836414","json":"https://patentable.app/api/llm-context/US-9836414","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T11:45:37.234Z"}