{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9837429","patent":{"patent_number":"US-9837429","title":"Method of fabricating a three-dimensional semiconductor memory device having a plurality of memory blocks on a peripheral logic structure","assignee":null,"inventors":[],"filing_date":"2016-11-10T00:00:00.000Z","publication_date":"2017-12-05T00:00:00.000Z","cpc_codes":["G11C","G11C","H01L","G11C"],"num_claims":10,"abstract":"A three-dimensional (3D) semiconductor memory device that includes a peripheral logic structure including peripheral logic circuits disposed on a semiconductor substrate and a first insulation layer overlapping the peripheral logic circuits, and a plurality of memory blocks spaced apart from each other on the peripheral logic structure. At least one of the memory blocks includes a well plate electrode, a semiconductor layer in contact with a first surface of the well plate electrode, a stack structure including a plurality of electrodes vertically stacked on the semiconductor layer, and a plurality of vertical structures penetrating the stack structure and connected to the semiconductor layer."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Method of fabricating a three-dimensional semiconductor memory device having a plurality of memory blocks on a peripheral logic structure","description":"A three-dimensional (3D) semiconductor memory device that includes a peripheral logic structure including peripheral logic circuits disposed on a semiconductor substrate and a first insulation layer o","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9837429","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9837429","citation_suggestion":"Patentable. \"Method of fabricating a three-dimensional semiconductor memory device having a plurality of memory blocks on a peripheral logic structure\" (US-9837429). https://patentable.app/patents/US-9837429","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9837429","json":"https://patentable.app/api/llm-context/US-9837429","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T12:47:11.970Z"}