{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9837480","patent":{"patent_number":"US-9837480","title":"Array substrate with double-gate TFT, method of fabricating the same, and display device","assignee":null,"inventors":[],"filing_date":"2015-03-18T00:00:00.000Z","publication_date":"2017-12-05T00:00:00.000Z","cpc_codes":["H01L"],"num_claims":20,"abstract":"An array substrate, a method for fabricating the array substrate and a display device are described. The array substrate includes: a first gate electrode metal layer; a first gate insulation layer; an active layer on the first gate insulation layer; an etching barrier layer on the active layer; a source-drain metal layer including a source electrode and a drain electrode that contact with two sides of the active layer respectively; a second gate insulation layer on the source-drain metal layer; and a second gate electrode metal layer on the second gate insulation layer. The array substrate has an optimized TFT performance and a reduced gate line resistance, and light may be blocked from irradiating on the active layer, which is beneficial to restrain IR Drop, drifting of TFT threshold voltages or generation of a light-incurred leakage current on the active layer. Performance of the display device is improved."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Array substrate with double-gate TFT, method of fabricating the same, and display device","description":"An array substrate, a method for fabricating the array substrate and a display device are described. The array substrate includes: a first gate electrode metal layer; a first gate insulation layer; an","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9837480","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9837480","citation_suggestion":"Patentable. \"Array substrate with double-gate TFT, method of fabricating the same, and display device\" (US-9837480). https://patentable.app/patents/US-9837480","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9837480","json":"https://patentable.app/api/llm-context/US-9837480","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T08:01:32.758Z"}