{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9841948","patent":{"patent_number":"US-9841948","title":"Microarchitecture for floating point fused multiply-add with exponent scaling","assignee":null,"inventors":[],"filing_date":"2015-08-12T00:00:00.000Z","publication_date":"2017-12-12T00:00:00.000Z","cpc_codes":["G06F","G06F"],"num_claims":13,"abstract":"Systems and methods for implementing a floating point fused multiply and accumulate with scaling (FMASc) operation. A floating point unit receives input multiplier, multiplicand, addend, and scaling factor operands. A multiplier block is configured to multiply mantissas of the multiplier and multiplicand to generate an intermediate product. Alignment logic is configured to pre-align the addend with the intermediate product based on the scaling factor and exponents of the addend, multiplier, and multiplicand, and accumulation logic is configured to add or subtract a mantissa of the pre-aligned addend with the intermediate product to obtain a result of the floating point unit. Normalization and rounding are performed on the result, avoiding rounding during intermediate stages."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Microarchitecture for floating point fused multiply-add with exponent scaling","description":"Systems and methods for implementing a floating point fused multiply and accumulate with scaling (FMASc) operation. A floating point unit receives input multiplier, multiplicand, addend, and scaling f","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9841948","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9841948","citation_suggestion":"Patentable. \"Microarchitecture for floating point fused multiply-add with exponent scaling\" (US-9841948). https://patentable.app/patents/US-9841948","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9841948","json":"https://patentable.app/api/llm-context/US-9841948","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T07:01:35.716Z"}