{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9847119","patent":{"patent_number":"US-9847119","title":"Tunable negative bitline write assist and boost attenuation circuit","assignee":null,"inventors":[],"filing_date":"2016-09-15T00:00:00.000Z","publication_date":"2017-12-19T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C"],"num_claims":14,"abstract":"An apparatus and method are provided for implementing write assist with boost attenuation for static random access memory (SRAM) arrays. The apparatus includes a memory array comprising a plurality of SRAM cells. The apparatus further includes a write driver connected to each of a differential pair of bit lines in each of the plurality of SRAM cells of the memory array. The apparatus further includes a write assist attenuation circuit connected to the write driver, the write assist attenuation circuit comprising a clamping device configured to modify a control signal as a function of supply voltage and process to attenuate an amount of boost applied to pull one of the bit lines below ground in an active phase of a write cycle."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Tunable negative bitline write assist and boost attenuation circuit","description":"An apparatus and method are provided for implementing write assist with boost attenuation for static random access memory (SRAM) arrays. The apparatus includes a memory array comprising a plurality of","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9847119","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9847119","citation_suggestion":"Patentable. \"Tunable negative bitline write assist and boost attenuation circuit\" (US-9847119). https://patentable.app/patents/US-9847119","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9847119","json":"https://patentable.app/api/llm-context/US-9847119","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T08:02:36.029Z"}