{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9847298","patent":{"patent_number":"US-9847298","title":"Three-dimensional integrated circuit laminate, and interlayer filler for three-dimensional integrated circuit laminate","assignee":null,"inventors":[],"filing_date":"2016-10-14T00:00:00.000Z","publication_date":"2017-12-19T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":11,"abstract":"To provide a three-dimensional integrated circuit laminate filled in with an interlayer filler composition having both high thermal conductivity and low linear expansion property.A three-dimensional integrated circuit laminate, which comprises a semiconductor substrate laminate having at least two semiconductor substrates each having a semiconductor device layer formed thereon laminated, and has a first interlayer filler layer containing a resin (A) and an organic filler (B) and having a thermal conductivity of at least 0.8 W/(m·K) between the semiconductor substrate."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Three-dimensional integrated circuit laminate, and interlayer filler for three-dimensional integrated circuit laminate","description":"To provide a three-dimensional integrated circuit laminate filled in with an interlayer filler composition having both high thermal conductivity and low linear expansion property.A three-dimensional i","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9847298","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9847298","citation_suggestion":"Patentable. \"Three-dimensional integrated circuit laminate, and interlayer filler for three-dimensional integrated circuit laminate\" (US-9847298). https://patentable.app/patents/US-9847298","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9847298","json":"https://patentable.app/api/llm-context/US-9847298","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T05:20:00.603Z"}