{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9852315","patent":{"patent_number":"US-9852315","title":"Systems and methods for detecting and mitigating programmable logic device tampering","assignee":null,"inventors":[],"filing_date":"2014-03-18T00:00:00.000Z","publication_date":"2017-12-26T00:00:00.000Z","cpc_codes":["G06F","G06F"],"num_claims":19,"abstract":"Systems and methods are disclosed for preventing tampering of a programmable integrated circuit device. Generally, programmable devices, such as FPGAs, have two stages of operation; a configuration stage and a user mode stage. To prevent tampering and/or reverse engineering of a programmable device, various anti-tampering techniques may be employed during either stage of operation to disable the device and/or erase sensitive information stored on the device once tampering is suspected. One type of tampering involves bombarding the device with a number of false configuration attempts in order to decipher encrypted data. By utilizing a dirty bit and a sticky error counter, the device can keep track of the number of failed configuration attempts that have occurred and initiate anti-tampering operations when tampering is suspected while the device is still in the configuration stage of operation."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Systems and methods for detecting and mitigating programmable logic device tampering","description":"Systems and methods are disclosed for preventing tampering of a programmable integrated circuit device. Generally, programmable devices, such as FPGAs, have two stages of operation; a configuration st","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9852315","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9852315","citation_suggestion":"Patentable. \"Systems and methods for detecting and mitigating programmable logic device tampering\" (US-9852315). https://patentable.app/patents/US-9852315","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9852315","json":"https://patentable.app/api/llm-context/US-9852315","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T08:20:56.338Z"}