{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9852994","patent":{"patent_number":"US-9852994","title":"Embedded vialess bridges","assignee":null,"inventors":[],"filing_date":"2016-11-17T00:00:00.000Z","publication_date":"2017-12-26T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":18,"abstract":"Embedded vialess bridges are provided. In an implementation, discrete pieces containing numerous conduction lines or wires in a 3-dimensional bridge piece are embedded where needed in a main substrate to provide dense arrays of signal, power, and electrical ground wires below the surface of the main substrate. Vertical conductive risers to reach the surface plane of the main substrate are also included in the discrete piece, for connecting to dies on the surface of the substrate and thereby interconnecting the dies to each other through the dense array of wires in the discrete piece. The discrete piece to be embedded may have parallel planes of conductors at regular intervals within itself, and thus may present a working surface homogeneously covered with the ends of vertical conductors available to connect surface components to each other and to ground and power at many places along the embedded piece."},"analysis":{"summary":"The **Embedded Vialess Bridges** patent (US-9852994) describes a revolutionary method for high-density electronic interconnection, fundamentally addressing the limitations of traditional circuit board routing and packaging. At its core, this innovation involves embedding discrete, three-dimensional bridge pieces directly into a main substrate. These specialized pieces are engineered to contain numerous conduction lines—for signal, power, and electrical ground—forming dense arrays of wiring beneath the surface of the main substrate.\n\nThe primary problem this technology solves is the increasing difficulty of achieving high component density and superior electrical performance in ever-shrinking electronic devices. Traditional methods often lead to crowded surface layouts, long signal paths, and complex via structures, which can degrade signal integrity, increase power consumption, and limit miniaturization. The Embedded Vialess Bridges approach mitigates these issues by creating an internal, multi-layered interconnect fabric.\n\nKey to its technical approach is the inclusion of vertical conductive risers within these embedded bridge pieces. These risers extend from the internal conduction lines directly to the surface plane of the main substrate, providing seamless, low-impedance connections to semiconductor dies mounted on the surface. This enables efficient inter-die communication and power delivery, effectively bypassing the need for many conventional through-hole vias and freeing up valuable surface real estate. The embedded pieces can also feature parallel planes of conductors, presenting a homogeneous surface of vertical connection points.\n\nFrom a business perspective, this invention offers significant value. It enables the creation of smaller, lighter, and more powerful electronic devices, opening new market opportunities in sectors like advanced mobile computing, wearables, IoT, AI hardware, and high-performance computing. Companies adopting this technology can achieve competitive advantages through superior product performance, reduced form factors, and potentially more streamlined manufacturing processes due to simplified surface routing. The market opportunity lies in licensing this foundational technology or integrating it into next-generation electronic products, driving innovation across various segments of the electronics industry.","layman_explanation":"### What Problem Does This Solve?\n\nImagine you're building a bustling city, but all the roads, power lines, and water pipes have to be laid out only on the surface. As your city grows and you add more buildings (electronic components) and services (data processing), the surface quickly becomes crowded, tangled, and inefficient. Traffic slows down, and it becomes impossible to add new buildings without tearing down old ones or making the city much, much bigger. In the world of electronics, this is the challenge of 'interconnect density.' As we demand thinner phones, faster smartwatches, and more powerful AI chips, the traditional way of wiring components on a flat circuit board reaches its limits. Wires get too long, signals degrade, and devices can't shrink any further without compromising performance.\n\n### How Does It Work?\n\nThe **Embedded Vialess Bridges** patent proposes a clever solution: instead of putting all the 'roads' (electrical connections) on the surface, it suggests building multi-level 'underground highways' directly *into* the foundation (the main substrate) of the electronic device. These 'highways' are not just simple layers; they are discrete, pre-built, three-dimensional blocks – think of them as miniature, pre-assembled highway interchanges. These blocks are packed with numerous, very fine conduction lines for carrying signals, power, and ground. Once these 'highway interchanges' are embedded, tiny 'elevators' (vertical conductive risers) from these underground networks pop up to the surface, connecting directly to the 'buildings' (computer chips or other components) that sit on top. This means the chips can talk to each other through the fast, efficient, hidden network, without cluttering the surface with miles of visible wires. It's like having a dedicated, high-speed subway system for electrons.\n\n### Why Does This Matter?\n\nThis innovation matters because it fundamentally changes the physical constraints of electronic design. By moving the complex wiring internal to the substrate, it enables: \n\n1.  **Unprecedented Miniaturization:** Devices can become significantly smaller and thinner without sacrificing performance, opening doors for advanced wearables, medical implants, and compact IoT devices.\n2.  **Enhanced Performance:** Shorter, more direct electrical paths mean faster signal speeds, less data loss, and more efficient power delivery. This is crucial for high-performance applications like AI processors, 5G/6G communication, and high-speed data centers.\n3.  **Design Flexibility:** Engineers gain more freedom on the surface of the circuit board, as much of the complex routing is handled internally. This can lead to simpler designs, potentially faster development cycles, and more robust products.\n4.  **Competitive Advantage:** Companies adopting this technology can create products that outperform and out-miniaturize competitors, capturing significant market share in cutting-edge electronics segments. The ROI comes from superior product features, reduced time-to-market, and the ability to command premium pricing.\n\n### What's Next?\n\nThe Embedded Vialess Bridges patent lays the groundwork for the next generation of electronics. We can expect to see this technology integrated into a wide range of products, from more powerful and discreet consumer gadgets to mission-critical systems in automotive and aerospace. Its adoption will likely accelerate the trend towards heterogeneous integration, where different types of chips are combined into a single, compact package. As manufacturing processes mature, this approach could become a standard for advanced packaging, enabling innovations we can only begin to imagine today, driving growth and investment across the entire tech ecosystem.","technical_analysis":"The **Embedded Vialess Bridges** patent (US-9852994) introduces a sophisticated solution to the long-standing challenges of high-density electronic interconnection, particularly in the context of miniaturization and enhanced performance. This innovation fundamentally re-architects how electrical pathways are established within an electronic assembly, moving beyond planar limitations to a true three-dimensional embedded approach.\n\n**Technical Architecture:** The core of this invention lies in the concept of a 'discrete piece' or a '3-dimensional bridge piece' that is embedded within a 'main substrate.' This discrete piece is not merely a segment of a multi-layer board but a self-contained, pre-fabricated conductive structure. It is designed to house numerous conduction lines or wires, forming dense, multi-layered arrays for signal, power, and electrical ground. These arrays reside entirely below the surface of the main substrate, creating an internal routing network that is highly compact and efficient.\n\n**Implementation Details:** The embedded discrete piece is characterized by its internal structure, which can include parallel planes of conductors at regular, tightly controlled intervals. This multi-layered internal wiring allows for extremely short and direct signal paths, minimizing parasitic capacitance and inductance. Crucially, the patent details 'vertical conductive risers' integrated within these discrete pieces. These risers serve as direct, low-impedance electrical connections that extend from the internal conduction lines up to the surface plane of the main substrate. This enables direct connectivity to active components, such as semiconductor dies (chips), mounted on the surface. By providing these direct vertical pathways, the system reduces the reliance on traditional through-hole vias in the main substrate, which often consume significant space and can introduce signal integrity issues.\n\nThe embedding process itself implies techniques where these pre-manufactured conductive structures are integrated into the main substrate during its fabrication. This could involve lamination, molding, or other advanced packaging techniques. The goal is to create a seamless, robust integration where the discrete piece becomes an integral part of the overall substrate. The resulting structure presents a 'working surface homogeneously covered with the ends of vertical conductors,' meaning that components placed anywhere over the embedded piece can readily connect to its internal power, ground, and signal networks.\n\n**Performance Characteristics:** The technical advantages are profound. The high density of conduction lines within the embedded piece allows for a dramatic increase in interconnect capacity per unit area, supporting complex, multi-chip architectures. The short, direct paths offered by the 3D structure and vertical risers significantly improve signal integrity by reducing propagation delays, crosstalk, and impedance discontinuities. This is critical for high-frequency operations and high-speed data transfer. Furthermore, the ability to integrate power and ground planes directly within the embedded structure enhances power delivery network (PDN) performance, reducing IR drop and improving decoupling effectiveness. This also contributes to better thermal management by distributing heat sources more effectively.\n\n**Integration Patterns and Code-Level Implications:** While this patent primarily focuses on hardware architecture, its implications extend to the design of heterogeneous integration and system-in-package (SiP) solutions. The improved density and performance enable more complex functional blocks to be integrated into smaller form factors. For software and firmware developers, this means potentially faster execution speeds due to reduced hardware latency, and the ability to run more sophisticated algorithms on compact devices. The 'vialess' nature (relative to traditional through-hole vias) simplifies routing constraints for designers, allowing for more optimal component placement and potentially automating certain aspects of layout design. This could lead to more efficient design tools and methodologies, accelerating product development cycles for next-generation electronics.","business_analysis":"The **Embedded Vialess Bridges** patent (US-9852994) represents a significant leap in electronic packaging technology, poised to unlock substantial business opportunities and drive market transformation. This innovation addresses critical limitations in current high-density interconnects, offering a pathway to superior performance and unprecedented miniaturization, which are key drivers across numerous high-growth sectors.\n\n**Market Opportunity Size:** The target market for this technology is vast, encompassing the entire advanced electronics industry. This includes, but is not limited to, high-performance computing (HPC), artificial intelligence (AI) accelerators, consumer electronics (smartphones, wearables, IoT devices), automotive electronics (ADAS, infotainment), medical devices, and aerospace. The global semiconductor packaging market alone is projected to reach over $60 billion by 2027, with advanced packaging segments growing even faster. Embedded Vialess Bridges directly targets this high-value segment by enabling next-generation packaging solutions that traditional methods cannot match. As devices become more complex and demand greater integration, the market for solutions that provide higher density and better performance will only expand.\n\n**Competitive Advantages:** This technology offers several compelling competitive advantages. Firstly, **superior density** allows for a greater number of components or functional blocks within the same or smaller footprint, leading to more compact and powerful products. Secondly, **enhanced electrical performance** (due to shorter, more direct signal paths and optimized power delivery) translates to faster operating speeds, lower power consumption, and improved reliability, directly impacting product differentiation. Thirdly, the **reduced reliance on traditional through-hole vias** can simplify manufacturing processes for the main substrate, potentially leading to higher yields and lower costs in the long run. Companies adopting this innovation can gain a significant lead in miniaturization and performance metrics, creating a barrier to entry for competitors relying on older interconnect paradigms.\n\n**Revenue Potential and Business Models:** Revenue generation from Embedded Vialess Bridges could manifest through several business models. **Licensing** the patented technology to major semiconductor manufacturers, foundries, and original equipment manufacturers (OEMs) represents a substantial opportunity. Companies could also develop and sell specialized **embedded bridge pieces** as components, becoming a key supplier in the advanced packaging ecosystem. Furthermore, integrating this technology into proprietary products (e.g., advanced AI chips, specialized modules) could lead to **premium product offerings** with superior performance characteristics, commanding higher margins and market share. The ability to enable entirely new product categories (e.g., truly invisible wearables, ultra-compact medical implants) also represents untapped revenue streams.\n\n**Strategic Positioning:** Strategically, Embedded Vialess Bridges positions adopting companies at the forefront of electronic hardware innovation. It allows them to overcome physical limitations that currently constrain product design, enabling them to bring next-generation concepts to market faster. This positions them as technology leaders, attracting talent and investment. For large players, it enhances their existing product portfolios and secures future competitiveness. For startups, it could provide a disruptive technology to challenge incumbents.\n\n**ROI Projections:** While specific ROI will depend on implementation and market adoption, the benefits are clear. Reduced product size can cut material costs and shipping expenses. Improved performance can lead to higher average selling prices (ASPs) and increased customer satisfaction. Faster development cycles, due to simplified routing and design flexibility, can accelerate time-to-market. The long-term ROI is also tied to maintaining a technological edge in a rapidly evolving industry, safeguarding future revenue streams and market relevance.","faqs":[{"answer":"Embedded Vialess Bridges is a groundbreaking patent (US-9852994) that introduces a novel method for high-density electronic interconnection. At its core, this innovation involves embedding discrete, three-dimensional conductive 'bridge pieces' directly into the main substrate of an electronic device. These specialized bridge pieces are engineered to contain numerous conduction lines or wires, creating dense arrays of signal, power, and electrical ground pathways that reside entirely below the surface of the main substrate.\n\nThe technology aims to overcome the limitations of traditional two-dimensional circuit board routing, which often struggles with increasing component density and performance demands. By moving complex wiring into the third dimension and embedding it, Embedded Vialess Bridges offers a more efficient and compact way to connect electronic components.\n\nEssentially, it's like building multi-level, high-speed electrical highways *inside* the circuit board itself, rather than just on its surface. This unique approach allows for significant improvements in device miniaturization, performance, and design flexibility, paving the way for next-generation electronic products across various industries. The patent provides a detailed blueprint for this advanced packaging technique.","question":"What is Embedded Vialess Bridges?"},{"answer":"The mechanism behind Embedded Vialess Bridges involves several key technical aspects. First, discrete, pre-fabricated 'bridge pieces' are manufactured. These pieces are three-dimensional and internally structured with multiple parallel planes of conductors, forming a dense network of electrical pathways for signals, power, and ground.\n\nSecond, these meticulously designed bridge pieces are then embedded directly into the main substrate of an electronic device during its manufacturing process. This integration ensures that the dense array of conduction lines is situated beneath the surface of the main substrate, effectively creating an internal, multi-layered wiring system.\n\nThird, and crucially, vertical conductive risers are integrated within these embedded bridge pieces. These risers extend upwards from the internal conduction lines to the surface plane of the main substrate. This design allows for direct, low-impedance electrical connections to semiconductor dies (chips) and other components mounted on the surface. These risers serve to interconnect the dies to each other through the dense array of wires within the embedded piece, minimizing the need for traditional through-hole vias and optimizing signal and power delivery. The system essentially creates a homogeneous surface of connection points for surface components to access the internal, high-density network.","question":"How does Embedded Vialess Bridges work?"},{"answer":"Embedded Vialess Bridges addresses several critical problems inherent in modern electronic design and manufacturing. The primary challenge it tackles is the 'interconnect bottleneck' – the increasing difficulty of achieving high component density and superior electrical performance in ever-shrinking electronic devices.\n\nTraditional two-dimensional routing on circuit boards leads to crowded surface layouts, long signal paths, and complex via structures. These issues can result in signal integrity degradation (e.g., crosstalk, reflections, latency), inefficient power delivery (e.g., IR drop, ground bounce), and significant consumption of valuable board real estate. These limitations directly hinder further miniaturization and limit the performance capabilities of advanced integrated circuits.\n\nBy embedding a 3D conductive structure with dense arrays of wires and direct vertical risers, Embedded Vialess Bridges provides a solution that: 1) dramatically increases interconnect density, 2) shortens signal paths for improved performance, 3) enhances power delivery efficiency, and 4) frees up surface area for component placement. This innovation fundamentally overcomes physical constraints that have long challenged the electronics industry.","question":"What problem does Embedded Vialess Bridges solve?"},{"answer":"The provided patent data does not list the inventors for Embedded Vialess Bridges (US-9852994). Patent filings typically include inventor names, but in this specific request, that information was omitted. Generally, inventors are individuals or a team of individuals who conceived the invention described in the patent. Assignees, if listed, are typically the companies or institutions to whom the inventors have assigned their rights to the patent.\n\nWithout the specific inventor names, we can only refer to the innovation by its title, Embedded Vialess Bridges, and acknowledge it as a significant contribution to the field of electronic packaging and interconnection technology. The absence of inventor details in this context does not diminish the technical merit or potential impact of the innovation itself. For full inventor details, one would typically consult the official patent document available through patent databases.","question":"Who invented Embedded Vialess Bridges?"},{"answer":"The Embedded Vialess Bridges patent offers a multitude of key benefits that are set to revolutionize electronic design and manufacturing:\n\n1.  **Unprecedented Miniaturization:** By moving complex wiring into a 3D embedded structure, this technology significantly reduces the overall footprint and thickness of electronic assemblies. This enables the creation of smaller, lighter, and more compact devices, critical for wearables, mobile, and IoT applications.\n2.  **Enhanced Electrical Performance:** The short, direct signal paths within the embedded bridge pieces and through the vertical conductive risers dramatically improve signal integrity. This means lower latency, reduced crosstalk, and more efficient power delivery, leading to faster operating speeds and better overall system performance for high-frequency and high-speed data applications.\n3.  **Increased Interconnect Density:** The ability to pack numerous conduction lines in a 3D embedded structure allows for a much higher density of connections per unit area compared to traditional methods. This supports more complex heterogeneous integration and multi-chip module designs.\n4.  **Simplified Design & Manufacturing:** By offloading complex routing to the embedded piece, the main substrate's surface is freed up. This simplifies board layout, potentially reducing design cycles, manufacturing complexity, and costs associated with traditional vias.\n5.  **Robust & Reliable Connections:** The integrated nature of the vertical risers provides stable and robust connections between the embedded network and surface components, contributing to overall device reliability. Embedded Vialess Bridges provides a powerful toolkit for engineers to overcome current design limitations.","question":"What are the key benefits of Embedded Vialess Bridges?"},{"answer":"Embedded Vialess Bridges distinguishes itself from prior art by offering a truly embedded, three-dimensional interconnect architecture, rather than relying solely on planar (2D) or stacked-2D approaches. Traditional PCBs and even advanced techniques like 2.5D interposers and certain Fan-Out Wafer-Level Packaging (FOWLP) still primarily route connections on surface layers or between closely stacked planar layers.\n\nKey differentiators for Embedded Vialess Bridges include:\n\n1.  **Discrete 3D Embedded Pieces:** Unlike prior art that builds layers incrementally, this invention uses pre-fabricated, self-contained 3D conductive 'bridge pieces' that are embedded. These pieces already contain dense, multi-layered wiring internally, moving the most complex routing *inside* the substrate from the outset.\n2.  **Integrated Vertical Risers:** Prior art heavily relies on through-hole vias (THVs) or microvias in the main substrate for vertical connections. Embedded Vialess Bridges integrates vertical conductive risers directly within the embedded piece, providing direct, low-impedance paths to surface components, significantly reducing the need for numerous main-substrate vias and their associated drawbacks.\n3.  **Homogeneous Surface Connectivity:** The embedded piece provides a uniform 'surface' of connection points, offering greater flexibility for component placement than fixed routing channels or limited via fields in prior art. This reduces surface routing congestion and allows for more optimal component layouts.\n\nWhile prior art has made advancements, Embedded Vialess Bridges offers a more fundamental shift by creating an internal, pre-engineered 3D interconnect fabric, leading to superior density, electrical performance, and miniaturization capabilities.","question":"How is Embedded Vialess Bridges different from prior art?"},{"answer":"The impact of Embedded Vialess Bridges is expected to be widespread, influencing numerous industries that rely on advanced electronics and the continuous drive for miniaturization and enhanced performance. Its ability to create denser, faster, and more compact electronic assemblies makes it relevant across a broad spectrum of sectors.\n\nKey industries that will be significantly impacted include:\n\n1.  **Consumer Electronics:** Smartphones, wearables, tablets, virtual/augmented reality (VR/AR) devices, and other personal electronics will benefit from smaller form factors, increased functionality, and improved battery life.\n2.  **High-Performance Computing (HPC) & Artificial Intelligence (AI):** Data centers, AI accelerators, and high-performance processors will leverage the enhanced signal integrity and power delivery to achieve faster computational speeds, lower latency, and greater energy efficiency.\n3.  **Automotive Electronics:** Advanced Driver-Assistance Systems (ADAS), infotainment systems, and autonomous vehicle platforms will benefit from more compact, reliable, and powerful electronic control units (ECUs) and sensor fusion modules.\n4.  **Medical Devices:** Miniaturized, high-performance medical implants, diagnostic tools, and portable health monitoring devices will see advancements in functionality, patient comfort, and reliability.\n5.  **Internet of Things (IoT):** Smaller, more power-efficient sensors and communication modules will enable the expansion of IoT into new applications and environments.\n6.  **Aerospace & Defense:** High-reliability, compact electronics are crucial for avionics, satellite systems, and defense applications where space and weight are at a premium. Embedded Vialess Bridges is poised to be a foundational technology for future innovations in all these areas.","question":"What industries will Embedded Vialess Bridges impact?"},{"answer":"The patent data provided indicates the following dates for Embedded Vialess Bridges (US-9852994):\n\n*   **Filing Date:** The patent application for Embedded Vialess Bridges was filed on **2016-11-17**.\n*   **Publication Date:** The patent was published on **2017-12-26**.\n\nThe filing date marks when the inventors or assignee submitted their application to the patent office, initiating the examination process. The publication date signifies when the patent document became publicly available, typically including the abstract, claims, and full description. This timeline indicates a relatively swift process from filing to publication, highlighting the innovation's potential significance and readiness for public disclosure. These dates are crucial for understanding the patent's lifecycle and its position within the broader landscape of technological development in electronic interconnects.","question":"When was Embedded Vialess Bridges filed/granted?"},{"answer":"The commercial applications of Embedded Vialess Bridges are extensive, spanning across various high-value segments of the electronics market due to its ability to enable superior performance and miniaturization. This technology offers a significant competitive edge for product development.\n\nKey commercial applications include:\n\n1.  **Next-Generation Mobile & Wearable Devices:** Manufacturers can develop ultra-thin smartphones, feature-rich smartwatches, and highly compact augmented reality (AR) glasses, offering enhanced user experiences and new form factors.\n2.  **High-Performance Computing & AI Accelerators:** The technology can be integrated into powerful processors for data centers, cloud infrastructure, and edge AI devices, leading to faster data processing, reduced latency, and improved energy efficiency.\n3.  **Advanced Automotive Systems:** It enables more compact and robust electronic control units (ECUs), sensor fusion modules for autonomous driving, and advanced infotainment systems, contributing to safer and smarter vehicles.\n4.  **Medical Implants & Diagnostics:** Miniaturized, high-performance medical devices such as pacemakers, neurostimulators, and portable diagnostic equipment can achieve greater functionality and less invasive designs.\n5.  **Industrial IoT & Robotics:** Compact and reliable embedded systems for industrial automation, smart manufacturing, and advanced robotics, where space and harsh environments are critical considerations.\n\nCompanies can commercialize this through licensing agreements, direct integration into their proprietary products, or by becoming a specialized supplier of the embedded bridge components. The commercial value of Embedded Vialess Bridges lies in its capacity to unlock new product possibilities and enhance existing ones, driving innovation and market leadership.","question":"What are the commercial applications of Embedded Vialess Bridges?"},{"answer":"Future developments for Embedded Vialess Bridges are likely to focus on further enhancing its capabilities, broadening its applicability, and refining its manufacturing processes. We can anticipate several key areas of evolution:\n\n1.  **Increased Density and Finer Pitch:** As demand for integration grows, future iterations of Embedded Vialess Bridges will likely feature even denser arrays of conduction lines and finer pitch vertical risers, allowing for connections to more complex and smaller dies.\n2.  **Integration of Passive Components:** The embedded bridge pieces could evolve to incorporate passive components like resistors, capacitors, and inductors directly within their 3D structure. This would further optimize space, improve electrical performance, and simplify overall board design.\n3.  **Advanced Materials:** Research into novel materials with higher conductivity, lower dielectric loss, and improved thermal management properties will enhance the performance and reliability of the embedded structures, especially for high-frequency and high-power applications.\n4.  **Hybrid Integration:** Future developments may see Embedded Vialess Bridges integrated with other advanced packaging techniques, such as 3D stacking (e.g., die-to-die or chiplet stacking), creating highly sophisticated heterogeneous integration platforms.\n5.  **Standardization and Design Automation:** As the technology gains traction, efforts will likely focus on developing industry standards and sophisticated Electronic Design Automation (EDA) tools specifically tailored for designing and optimizing systems using Embedded Vialess Bridges, streamlining the development process.\n\nThese advancements will further solidify Embedded Vialess Bridges as a cornerstone technology for the next generation of compact, high-performance, and intelligent electronic systems, pushing the boundaries of what's possible in microelectronics.","question":"What are the future developments expected for Embedded Vialess Bridges?"}],"topics":["embedded vialess bridges","high-density interconnects","3D packaging","semiconductor technology","electronics innovation","technical","background","interconnect"],"tech_cluster":null},"seo":{"title":"Embedded Vialess Bridges - High-Density Interconnect Patent US-9852994","description":"Discover Embedded Vialess Bridges, a revolutionary patent for high-density electronic interconnects. Learn how 3D embedded bridge pieces enable smaller, faster, and more powerful devices.","keywords":["embedded vialess bridges","high-density interconnects","3D packaging","semiconductor technology","electronics innovation","miniaturization","signal integrity","power delivery networks","patent US-9852994","advanced electronic packaging","vertical conductive risers","chip interconnection"]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9852994","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9852994","citation_suggestion":"Patentable. \"Embedded vialess bridges\" (US-9852994). https://patentable.app/patents/US-9852994","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9852994","json":"https://patentable.app/api/llm-context/US-9852994","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T07:03:05.522Z"}