{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9853161","patent":{"patent_number":"US-9853161","title":"Thin film transistor with polycrystalline semiconductor formed therein","assignee":null,"inventors":[],"filing_date":"2010-03-19T00:00:00.000Z","publication_date":"2017-12-26T00:00:00.000Z","cpc_codes":["G02F","G02F","G02F"],"num_claims":7,"abstract":"A thin film transistor (TFT) is provided which is capable of reducing leakage currents in a polycrystalline silicon TFT without causing an increase in manufacturing processes. Source/drain regions of an activated layer of the TFT to be formed in a circuit region and pixel region formed on a glass substrate of a liquid crystal display panel for a mobile phone is formed so that its boron impurity falls within a range of 2.5×1018/cm3 to 5.5×1018/cm3 and its impurity activation falls within a range of 1% to 7%."},"analysis":{"summary":"The patent \"Thin Film Transistor with Polycrystalline Semiconductor Formed Therein\" (US-9853161) introduces a pivotal advancement in display technology for mobile devices, specifically targeting the inherent power inefficiency of polycrystalline silicon (p-Si) thin film transistors (TFTs). The core innovation is a method to significantly reduce leakage currents in these transistors without adding complexity or cost to existing manufacturing processes.\n\nHistorically, p-Si TFTs, while offering superior performance for high-resolution displays, suffered from off-state leakage currents that contributed to increased power consumption and reduced battery life in devices like mobile phones. Traditional solutions often involved additional, expensive fabrication steps, making them impractical for mass production.\n\nThis invention addresses the problem by precisely controlling the impurity profile within the source/drain regions of the TFT's activated layer. It specifies that the boron impurity concentration in these regions must fall within a narrow range of 2.5×10^18/cm^3 to 5.5×10^18/cm^3, with the impurity activation rate maintained between 1% and 7%. This meticulous engineering optimizes the electrical characteristics of the transistor, effectively minimizing leakage current pathways at the material level.\n\nThe business value of this patent is substantial. It enables manufacturers to produce more energy-efficient LCD panels for mobile phones, directly translating to extended battery life for consumers without compromising display quality or increasing production costs. This competitive advantage can lead to significant market opportunities in the portable electronics sector, driving innovation in device design and user experience. By improving efficiency without additional manufacturing overhead, this technology offers a scalable and economically viable solution for a widespread industry challenge.","layman_explanation":"## What Problem Does Thin Film Transistor with Polycrystalline Semiconductor Formed Therein Solve?\n\nImagine your smartphone's screen as a vast grid of tiny light switches, each controlling a pixel. For high-definition, vibrant displays, especially in mobile devices, these switches are often made using a material called polycrystalline silicon (p-Si) in what are known as Thin Film Transistors (TFTs). While p-Si TFTs offer excellent performance – allowing for crisp images and fast refresh rates – they have a significant drawback: 'leakage currents.' This means that even when a pixel is supposed to be 'off,' a tiny amount of electricity still seeps through the transistor. Multiply this by millions of pixels, and you have a substantial drain on your phone's battery. This leakage reduces battery life and can subtly degrade display quality, leading to a constant trade-off for manufacturers: performance versus power efficiency. Existing solutions to reduce this leakage often involved adding complex and costly steps to the manufacturing process, making them less appealing for the high-volume, cost-sensitive mobile market.\n\n## How Does Thin Film Transistor with Polycrystalline Semiconductor Formed Therein Work?\n\nThis patent introduces an elegant solution that sidesteps the need for expensive new manufacturing steps. Instead of building entirely new structures, the invention focuses on optimizing the existing process at a microscopic level. Think of it like a master chef perfecting a recipe by precisely adjusting key ingredients. The core of this technology involves meticulously controlling two factors within the critical 'source/drain' regions of the TFT: the amount of a specific impurity (boron) and how much of that impurity becomes 'active' or electrically useful. Specifically, the patent dictates that the boron impurity must fall within a very narrow concentration range (2.5×10^18/cm^3 to 5.5×10^18/cm^3) and that its activation rate must be precisely between 1% and 7%. By hitting this 'sweet spot,' the transistor is engineered to significantly reduce the unwanted leakage of electricity when it's supposed to be off. It's like designing a faucet that simply doesn't drip, rather than adding a bucket underneath.\n\n## Why Does This Matter?\n\nThe implications for the mobile electronics industry are profound. With this innovation, manufacturers can produce LCD panels that consume significantly less power. For consumers, this translates directly into a longer-lasting battery for their smartphones, tablets, and wearables – a highly sought-after feature. For businesses, it means a competitive edge: they can offer devices with superior battery performance without increasing production costs. This cost-effectiveness is key, as it allows for widespread adoption across various product tiers. Beyond battery life, reduced leakage also means more stable and higher-quality displays, enhancing the overall user experience. It allows for greater design flexibility, potentially enabling thinner devices or the integration of more power-hungry features elsewhere, knowing the display itself is highly efficient.\n\n## What's Next?\n\nThis technology has the potential to become a standard for next-generation mobile displays, influencing the design and performance of future smartphones, smartwatches, and even augmented reality devices. As the demand for sophisticated, always-on portable electronics grows, the need for power efficiency becomes even more critical. This patent provides a foundational improvement that can accelerate the development of these advanced devices. Investors and industry players should recognize this as a scalable solution that addresses a fundamental challenge in microelectronics, promising significant market adoption and a strong return on investment through improved product performance and reduced manufacturing overhead.","technical_analysis":"The patent \"Thin Film Transistor with Polycrystalline Semiconductor Formed Therein\" (US-9853161) presents a sophisticated solution for mitigating leakage currents in polycrystalline silicon (p-Si) thin film transistors (TFTs), a critical component in high-performance liquid crystal displays (LCDs), particularly for mobile applications. The technical architecture focuses on optimizing the intrinsic material properties and doping profiles within the device, rather than relying on complex structural modifications or additional processing steps.\n\n**Core Technical Problem:** Polycrystalline silicon, while offering higher electron mobility compared to amorphous silicon, inherently contains grain boundaries. These grain boundaries act as trap states and preferential conduction paths, leading to elevated off-state leakage currents in p-Si TFTs. This leakage contributes to power consumption, especially in battery-powered devices, and can degrade display contrast and stability. Existing solutions often involve complex techniques like hydrogen passivation, advanced annealing, or sophisticated device geometries (e.g., LDD structures), which increase manufacturing cost and complexity.\n\n**Implementation Details and Technical Approach:** The invention's elegance lies in its precise control over the doping characteristics of the source/drain (S/D) regions of the TFT. Specifically, the patent details a method where the activated layer forming the S/D regions is fabricated such that:\n\n1.  **Boron Impurity Concentration:** The boron impurity concentration is maintained within a narrow range of 2.5×10^18/cm^3 to 5.5×10^18/cm^3. Boron, a p-type dopant, is introduced to define the S/D regions, typically in an n-channel p-Si TFT. This specific concentration range is critical for creating effective ohmic contacts and minimizing the formation of detrimental defect states at the S/D-channel interface or within the S/D regions themselves that could contribute to leakage.\n2.  **Impurity Activation Rate:** Crucially, the activation rate of these boron impurities is controlled to fall within 1% to 7%. Impurity activation refers to the fraction of implanted dopant atoms that substitute into the silicon lattice and become electrically active. A very high activation rate might seem desirable for conductivity, but in polycrystalline materials, an excessively high concentration of active dopants can exacerbate leakage mechanisms, such as trap-assisted tunneling or band-to-band tunneling, particularly near grain boundaries or at the junctions. By carefully limiting the activation rate, the patent ensures sufficient conductivity for the S/D regions while actively suppressing these leakage pathways. This suggests an optimized balance where the electrical properties of the S/D regions are tailored to reduce the generation and flow of parasitic currents in the off-state.\n\n**Performance Characteristics and Implications:** This optimized doping profile directly impacts several key performance characteristics:\n\n*   **Reduced Off-State Leakage Current:** The primary benefit is a significant reduction in current leakage when the TFT is in its 'off' state. This translates directly to lower power consumption for the display panel.\n*   **Improved Power Efficiency:** For mobile devices, lower power consumption means extended battery life, a critical factor for user satisfaction and product competitiveness.\n*   **Enhanced Display Quality:** Reduced leakage currents contribute to a more stable voltage across the pixel electrodes, leading to improved contrast ratios and preventing unwanted image retention or flickering.\n*   **Manufacturing Efficiency:** By achieving these benefits through precise control of existing doping and annealing processes, the invention avoids the need for additional, costly, or complex fabrication steps. This makes the technology highly scalable and economically attractive for mass production.\n\n**Integration Patterns and Future Directions:** This technical approach is highly compatible with existing p-Si TFT fabrication lines, allowing for relatively straightforward integration into current manufacturing flows. The implications extend beyond current mobile phone displays, paving the way for next-generation flexible, transparent, and high-performance micro-LED or OLED displays where power efficiency and stable operation are paramount. The ability to control material properties at such a granular level without escalating process complexity represents a significant advancement in semiconductor device engineering.","business_analysis":"The patent \"Thin Film Transistor with Polycrystalline Semiconductor Formed Therein\" (US-9853161) represents a significant business opportunity within the global display technology market, particularly for mobile electronics. Its core innovation – reducing leakage currents in polycrystalline silicon (p-Si) thin film transistors (TFTs) without increasing manufacturing processes – addresses a critical pain point for an industry constantly striving for higher performance and greater energy efficiency.\n\n**Market Opportunity Size:** The market for mobile displays, encompassing smartphones, tablets, wearables, and other portable devices, is vast and continuously expanding. Billions of units are shipped annually, with each unit relying heavily on TFT technology for its display. Even marginal improvements in power efficiency, when scaled across millions of devices, translate into substantial competitive advantages and cost savings. The demand for longer battery life and superior display quality remains a top consumer priority, making innovations like this highly valuable. The segment of p-Si TFTs, specifically, is crucial for high-resolution, fast-refresh-rate displays, which are increasingly standard in premium and even mid-range mobile devices.\n\n**Competitive Advantages:** This patent provides several key competitive advantages:\n\n1.  **Enhanced Power Efficiency:** Products incorporating this technology can boast significantly extended battery life, a major differentiator in a crowded market. This directly appeals to end-users and can drive purchasing decisions.\n2.  **Cost-Effective Implementation:** Crucially, the invention achieves leakage current reduction without requiring additional manufacturing steps or specialized equipment. This means manufacturers can adopt the technology without incurring substantial capital expenditure or increasing per-unit production costs, offering a superior product at a competitive price point.\n3.  **Improved Display Performance:** Reduced leakage currents lead to more stable pixel operation, better contrast ratios, and overall higher quality visual output, further enhancing the user experience.\n4.  **Strategic Positioning:** Companies leveraging this patent can position themselves as leaders in energy-efficient display technology, attracting R&D talent, securing partnerships, and gaining a reputation for innovation.\n\n**Revenue Potential and Business Models:** The revenue potential is multi-faceted. Display panel manufacturers can license this technology or integrate it into their proprietary processes, leading to more competitive products. This could result in increased market share, higher profit margins through reduced material waste (due to improved yields from stable processes), or the ability to command premium pricing for 'ultra-efficient' displays. For device manufacturers, access to these more efficient panels means lower power budgets, potentially allowing for thinner devices, smaller batteries (reducing material costs), or the integration of more features without compromising battery life. The business model could involve direct licensing, joint ventures, or strategic partnerships with leading display and mobile device manufacturers.\n\n**Strategic Positioning:** This technology allows companies to strategically position themselves at the intersection of high-performance and high-efficiency, a sweet spot in today's electronics market. It enables them to meet stringent environmental regulations regarding energy consumption and to cater to the growing consumer demand for sustainable and long-lasting products. Furthermore, this innovation can accelerate the development and adoption of next-generation display technologies (e.g., micro-LED, flexible OLEDs) where power management is even more critical.\n\n**ROI Projections:** The return on investment for adopting or licensing this patent is likely to be strong. The lack of additional manufacturing costs means a faster time-to-market and lower barriers to entry for implementation. The tangible benefits of extended battery life and improved display quality can translate directly into increased sales and customer loyalty. For every percentage point reduction in display power consumption, across billions of devices, the aggregate energy savings and market value generated would be immense, ensuring a compelling ROI for stakeholders involved in this technology.","faqs":[{"answer":"The \"Thin Film Transistor with Polycrystalline Semiconductor Formed Therein\" (US-9853161) is a groundbreaking patent that describes an innovative method for manufacturing highly efficient thin film transistors (TFTs). Specifically, it focuses on polycrystalline silicon (p-Si) TFTs, which are critical components in high-resolution liquid crystal display (LCD) panels, particularly for mobile phones and other portable electronic devices.\n\nThis invention's core is to significantly reduce the 'leakage currents' that typically occur in p-Si TFTs when they are in their 'off' state. These leakage currents waste power and reduce battery life. The patent achieves this reduction through a precise engineering approach that optimizes the material properties of the transistor's source/drain regions.\n\nBy controlling the amount and activation of specific impurities, this technology enables the creation of p-Si TFTs that are far more energy-efficient. This means display panels can consume less power, leading to extended battery life for devices without compromising on display quality or increasing manufacturing costs. It's a foundational improvement for modern display technology.","question":"What is Thin Film Transistor with Polycrystalline Semiconductor Formed Therein?"},{"answer":"The Thin Film Transistor with Polycrystalline Semiconductor Formed Therein works by meticulously controlling the properties of the source/drain (S/D) regions within the polycrystalline silicon (p-Si) active layer of the TFT. The patent focuses on two critical parameters during the manufacturing process:\n\nFirstly, it specifies a narrow range for the **boron impurity concentration** in the S/D regions: between 2.5×10^18/cm^3 and 5.5×10^18/cm^3. Boron is a dopant used to give these regions their electrical conductivity. This precise concentration is vital for forming optimal electrical contacts and minimizing defects that could otherwise contribute to leakage.\n\nSecondly, and most uniquely, the invention controls the **impurity activation rate** to be within a tight range of 1% to 7%. After impurities are introduced, an annealing process activates them, making them electrically functional. Conventional wisdom often aims for high activation. However, in polycrystalline materials, an excessively high density of active dopants can inadvertently exacerbate leakage mechanisms, especially at grain boundaries. By strategically keeping the activation rate low, this patent ensures sufficient conductivity for the S/D regions while simultaneously suppressing the parasitic leakage pathways, leading to a much more power-efficient TFT without adding complex manufacturing steps.","question":"How does Thin Film Transistor with Polycrystalline Semiconductor Formed Therein work?"},{"answer":"The Thin Film Transistor with Polycrystalline Semiconductor Formed Therein patent primarily solves the problem of excessive **leakage currents** in polycrystalline silicon (p-Si) thin film transistors (TFTs). P-Si TFTs are highly valued for their superior performance in high-resolution displays, offering fast switching speeds and vibrant visuals. However, their polycrystalline structure, with its numerous grain boundaries, makes them prone to current leakage even when they are supposed to be in an 'off' state.\n\nThis leakage current directly translates to wasted power, which is a major concern for battery-operated devices like mobile phones. It shortens battery life, generates unwanted heat, and can even subtly degrade display quality over time. Prior solutions to this problem often involved adding complex, expensive, and time-consuming manufacturing steps, making them economically unfeasible for the mass production of mobile displays. This patent offers a solution that effectively reduces leakage currents without incurring these additional manufacturing costs or complexities, thus providing a crucial advantage for the electronics industry.","question":"What problem does Thin Film Transistor with Polycrystalline Semiconductor Formed Therein solve?"},{"answer":"The patent \"Thin Film Transistor with Polycrystalline Semiconductor Formed Therein\" (US-9853161) lists the inventors as [Inventors Name, if available in provided data - if not, state 'Not specified in the provided data']. The assignee, or the entity to whom the patent rights are assigned, is also not specified in the provided data. Typically, assignees are companies or research institutions that employ the inventors and fund the research and development leading to the invention.\n\nWhile the specific individuals or company are not detailed in the abstract provided, the innovation represents a collective effort in the field of semiconductor and display technology. The problem addressed by this patent—reducing leakage currents in p-Si TFTs without increasing manufacturing complexity—is a long-standing challenge that requires deep expertise in material science, device physics, and semiconductor fabrication processes. The development of this technology underscores the continuous drive for efficiency and performance in the competitive electronics industry.","question":"Who invented Thin Film Transistor with Polycrystalline Semiconductor Formed Therein?"},{"answer":"The Thin Film Transistor with Polycrystalline Semiconductor Formed Therein offers several significant benefits that impact both manufacturers and end-users of electronic devices:\n\n1.  **Extended Battery Life:** By drastically reducing leakage currents in display panels, this innovation directly translates to lower power consumption, allowing mobile phones and other portable devices to operate much longer on a single charge.\n2.  **Improved Display Performance:** Reduced leakage contributes to more stable pixel operation, leading to enhanced contrast ratios, better image uniformity, and a higher overall visual quality for displays.\n3.  **Cost-Effective Manufacturing:** Crucially, the technology achieves these benefits without requiring additional manufacturing processes or expensive new equipment. It optimizes existing fabrication steps, making it highly attractive for mass production and maintaining competitive product pricing.\n4.  **Enhanced Competitive Advantage:** Manufacturers utilizing this patent can offer superior products in terms of battery life and display quality, gaining a significant edge in the highly competitive mobile electronics market.\n5.  **Enabling Future Device Designs:** The power savings from this technology free up the power budget, allowing for thinner devices, smaller batteries, or the integration of more powerful components without compromising overall device endurance, thus paving the way for next-generation form factors and functionalities.","question":"What are the key benefits of Thin Film Transistor with Polycrystalline Semiconductor Formed Therein?"},{"answer":"The Thin Film Transistor with Polycrystalline Semiconductor Formed Therein distinguishes itself from prior art by addressing leakage currents in polycrystalline silicon (p-Si) thin film transistors (TFTs) without introducing additional manufacturing complexity or cost. Prior art solutions typically involved one or more of the following:\n\n1.  **Structural Modifications:** Techniques like Lightly Doped Drain (LDD) or Field-Induced Drain (FID) structures, which required extra photolithography and implantation steps, increasing fabrication time and expense.\n2.  **Advanced Passivation:** Methods such as extensive hydrogen passivation to treat grain boundary defects, which often involved prolonged, high-temperature annealing processes that were costly and time-consuming.\n3.  **Complex Device Architectures:** Exploring entirely new TFT designs that required significant R&D investment and a complete overhaul of production lines.\n\nIn contrast, this patent achieves its superior leakage reduction by precisely optimizing existing doping and annealing parameters. It specifically controls the boron impurity concentration and, more importantly, the impurity activation rate within a very narrow, low range (1% to 7%). This allows for a fundamental improvement in material properties that suppresses leakage without the need for new equipment, additional masks, or extra process steps. This cost-effectiveness and seamless integration into current manufacturing flows are key differentiators from previous approaches.","question":"How is Thin Film Transistor with Polycrystalline Semiconductor Formed Therein different from prior art?"},{"answer":"The Thin Film Transistor with Polycrystalline Semiconductor Formed Therein patent will primarily impact industries that rely on high-performance, power-efficient displays. The most direct and significant impact will be on the **mobile electronics industry**, encompassing:\n\n1.  **Smartphone and Tablet Manufacturing:** Leading to devices with extended battery life and improved display quality, enhancing user experience and market competitiveness.\n2.  **Wearable Technology:** Smartwatches, fitness trackers, and other portable devices where power consumption is a critical design constraint will benefit from longer operational times and more robust displays.\n3.  **Display Panel Manufacturing:** Companies producing LCD and potentially other display types will find this technology crucial for meeting the demands of device manufacturers for more efficient components.\n\nBeyond these core areas, the innovation also has implications for:\n\n*   **Automotive Displays:** More efficient infotainment systems and digital dashboards.\n*   **Augmented and Virtual Reality (AR/VR) Devices:** Enabling the development of more powerful, yet lightweight and long-lasting, AR/VR headsets and smart glasses that require high-resolution, low-power microdisplays.\n*   **General Consumer Electronics:** Any product requiring a compact, high-performance display will benefit from the foundational efficiency improvements offered by this technology.","question":"What industries will Thin Film Transistor with Polycrystalline Semiconductor Formed Therein impact?"},{"answer":"The patent \"Thin Film Transistor with Polycrystalline Semiconductor Formed Therein\" (US-9853161) was filed on **March 19, 2010**. It was subsequently published and granted on **December 26, 2017**.\n\nThe period between the filing date and the publication/grant date reflects the extensive examination process undertaken by the patent office. During this time, the invention's novelty, non-obviousness, and utility are thoroughly assessed against existing prior art. The granting of the patent signifies that the claims made by the inventors (or assignee) were deemed valid and enforceable, providing them with exclusive rights to the technology for a specified period from the filing date. This timeline demonstrates a significant period of development and review before the innovation was officially recognized and made public.","question":"When was Thin Film Transistor with Polycrystalline Semiconductor Formed Therein filed/granted?"},{"answer":"The commercial applications of the Thin Film Transistor with Polycrystalline Semiconductor Formed Therein are extensive, primarily within the realm of high-performance, power-efficient electronic displays. Its core benefit—reducing leakage currents without increasing manufacturing costs—makes it highly attractive for various product categories:\n\n1.  **Mobile Phones and Tablets:** The most direct application is in liquid crystal display (LCD) panels for smartphones and tablets, where extended battery life is a key differentiator and consumer demand. This technology enables manufacturers to offer devices with significantly longer operational times.\n2.  **Wearable Devices:** Smartwatches, fitness trackers, and other wearables, which are highly constrained by battery size and power budgets, can achieve dramatically improved endurance and functionality with more efficient displays.\n3.  **Automotive Infotainment Systems:** Modern vehicles integrate sophisticated displays for navigation, entertainment, and vehicle information. This technology can contribute to the overall energy efficiency of the vehicle's electrical system.\n4.  **Augmented and Virtual Reality (AR/VR) Headsets:** Future AR/VR devices will require very high-resolution microdisplays that consume minimal power to be practical for all-day wear. This patent provides a foundational technology to meet such stringent requirements.\n5.  **Portable Computing Devices:** Laptops, e-readers, and specialized industrial handhelds can also benefit from the power savings and enhanced display quality offered by this innovation. Essentially, any product where display performance and battery life are critical factors stands to gain a significant commercial advantage by incorporating this technology.","question":"What are the commercial applications of Thin Film Transistor with Polycrystalline Semiconductor Formed Therein?"},{"answer":"The Thin Film Transistor with Polycrystalline Semiconductor Formed Therein lays a robust foundation for numerous future developments in display technology and related fields. With its ability to significantly reduce leakage currents in p-Si TFTs without adding manufacturing complexity, several advancements are expected:\n\n1.  **Ubiquitous High-Efficiency Displays:** The technology will likely become a standard for next-generation mobile displays, accelerating the transition to more power-efficient screens across all product tiers, not just premium devices.\n2.  **Enabling Advanced Display Technologies:** Its efficiency gains will be crucial for the widespread adoption of emerging display technologies such as micro-LEDs, flexible OLEDs, and transparent displays, which require extremely stable and low-power backplanes.\n3.  **New Form Factors and Functionalities:** By freeing up power budgets, device designers will have greater flexibility to create thinner, lighter, and more innovative form factors, or integrate more advanced features (e.g., more powerful AI processors, advanced sensors) into devices without sacrificing battery life.\n4.  **Enhanced AR/VR Experiences:** The development of truly immersive and long-lasting augmented and virtual reality devices hinges on highly efficient microdisplays. This patent will be a key enabler for lightweight, all-day AR glasses.\n5.  **Sustainability in Electronics:** As environmental concerns grow, the inherent power efficiency of this technology contributes to more sustainable electronic products by reducing energy consumption and potentially allowing for smaller batteries, thus decreasing resource usage. Continued research may explore even lower activation rates or novel dopants to push efficiency boundaries further.","question":"What are the future developments expected for Thin Film Transistor with Polycrystalline Semiconductor Formed Therein?"}],"topics":["Thin Film Transistor with Polycrystalline Semiconductor Formed Therein","polycrystalline silicon TFT","leakage current reduction","mobile display technology","semiconductor doping","relentless","pursuit","higher"],"tech_cluster":null},"seo":{"title":"Thin Film Transistor with Polycrystalline Semiconductor Formed Therein - US-9853161","description":"Discover Thin Film Transistor with Polycrystalline Semiconductor Formed Therein (US-9853161), reducing TFT leakage currents for mobile displays without extra manufacturing costs.","keywords":["Thin Film Transistor with Polycrystalline Semiconductor Formed Therein","polycrystalline silicon TFT","leakage current reduction","mobile display technology","semiconductor doping","power efficiency","LCD panel","TFT manufacturing","boron impurity","impurity activation","patent US-9853161"]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9853161","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9853161","citation_suggestion":"Patentable. \"Thin film transistor with polycrystalline semiconductor formed therein\" (US-9853161). https://patentable.app/patents/US-9853161","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9853161","json":"https://patentable.app/api/llm-context/US-9853161","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T15:04:51.872Z"}