Structure for LCD Panel

1. A structure for liquid crystal display (LCD) panel, which comprises: in an active area of the LCD panel, a plurality of parallel horizontal gate scan lines, a plurality of parallel vertical data lines, a plurality of sub-pixels arranged in an array form, a plurality of common voltage branch lines disposed horizontally corresponding to sub-pixels of each column, and a first common voltage bus and a second common voltage bus, disposed vertically respectively at two sides of the active area, a zeroth scan line disposed horizontally outside of the active area, and a zeroth common voltage branch disposed horizontally outside of the active area, the first common voltage bus transmitting a first common voltage Vcom 1 different from a common voltage Vcom 2 transmitted by the second common voltage bus; each sub-pixel comprising: a thin film transistor (TFT), and a storage capacitor and a liquid crystal (LC) capacitor, connected in parallel; for a positive integer s, the sources of the TFTs of the sub-pixels in the s-th column connected to the s-th data line; for a positive integer n, the n-th gate scan line located above the sub-pixels of the n-th column, the n-th common voltage branch located below the sub-pixels of the n-th column; the gates of the TFTs of sub-pixels of the n-th column connected to the n-th scan line; for an odd number i, one end of the storage capacitor and the LC capacitor of any sub-pixel in the i-th column connected to the drain of the corresponding TFT, for sub-pixels in the odd-numbered rows of the i-th column, the other end connected to the corresponding i-th common voltage branch, and for sub-pixels in the even-numbered rows of the i-th column, the other end connected to the (i−1)-th common voltage branch; the corresponding i-th common voltage branch connected through a first switch TFT to the first common voltage bus, and the (i−1)-th common voltage branch connected through a second switch TFT to the second common voltage bus; the first switch TFT having the gate connected to the corresponding i-th scan line, the source connected to the second common voltage bus, and the drain connected to corresponding i-th common voltage branch; for the (i+1)-th column, one end of the storage capacitor and the LC capacitor of any sub-pixel connected to the drain of the corresponding TFT, for sub-pixels in the odd-numbered rows of the (i+1)-th column, the other end connected to the corresponding (i+1)-th common voltage branch, for sub-pixels in the even-numbered rows of the (i+1)-th column, the other end connected to the i-th common voltage branch; the corresponding (i+1)-th common voltage branch connected through a second switch TFT to the second common voltage bus; and the first switch TFT having the gate connected to the corresponding odd-numbered scan line, the source connected to the first common voltage bus, and the drain connected to corresponding odd-numbered common voltage branch; the second switch TFT having the gate connected to the corresponding even-numbered scan line or the zeroth scan line, the source connected to the second common voltage bus, and the drain connected to corresponding even-numbered common voltage branch or the zeroth common voltage branch.

2. The structure for LCD panel as claimed in claim 1 , wherein one of the first common voltage Vcom 1 transmitted on the first common voltage bus, and the second common voltage Vcom 2 transmitted on the second common voltage bus is greater than the pixel voltage, and the other is smaller than the pixel voltage.

3. The structure for LCD panel as claimed in claim 2 , wherein in two adjacent frames, the first common voltage Vcom 1 transmitted on the first common voltage bus, and the second common voltage Vcom 2 transmitted on the second common voltage bus are switched to realize the inversion mode.

4. The structure for LCD panel as claimed in claim 1 , wherein the TFTs are low temperature polysilicon (LTPS) TFTs.