Liquid Crystal Display

1. A liquid crystal display (LCD), comprising: a substrate, comprising a pixel array section and a circuit arrangement section arranged on a first side and a second side of the pixel array section; a plurality of gate on array (GOA) units connected in series, disposed on the circuit arrangement section, for outputting a scanning signal to the pixel array section based on voltage levels of a plurality of clock signals and a voltage level of a start signal; a controller, for generating the plurality of clock signals and the start signal; a level shifter, electrically connected to the controller, for adjusting the voltage levels of the plurality of clock signals and the voltage level of the start signal; and an over-current protection circuit, electrically connected to the level shifter, for outputting an adjusting signal to the controller to turn off the LCD when a magnitude of one of the plurality of clock signals is over a predetermined value; wherein the plurality of clock signals comprise a first clock signal, a second clock signal, and a third clock signal, each of the plurality of GOA circuit units at each stage for outputting a scanning signal at an output terminal according to a scanning signal output by a GOA circuit unit at a previous stage, a scanning signal output by a GOA circuit unit at a next stage, a first constant voltage, a second constant voltage, the first clock signal, the second clock signal, and the third clock signal, wherein upon receiving the adjusting signal, the controller switches the clock signals and the start signal to a floating state, and then turns off the LCD, wherein each of the plurality of GOA circuit units at each stage comprises: an input control module, for outputting a controlling signal at a controlling node according to the first clock signal and the third clock signal; an output control module, electrically connected to the controlling node, for outputting the scanning signal at the output terminal according to the controlling signal and the second clock signal; and a pull-down module, electrically connected to the output control module, for pulling the scanning signal down to be at low level, wherein the pull-down module comprises: a first transistor, comprising a gate electrically connected to the controlling node, a drain electrically connected to a pull-down driving node, and a source electrically connected to the first constant voltage; a second transistor, comprising a gate electrically connected to the pull-down driving node, a drain electrically connected to the output terminal, and a source electrically connected to the first constant voltage; a third transistor, comprising a gate electrically connected to the pull-down driving node, and a source electrically connected to the first constant voltage; and a resistor, comprising two terminals electrically connected to the second constant voltage and the pull-down driving node, respectively.

2. The LCD as claimed in claim 1 , wherein upon receiving the adjusting signal, the controller switches the clock signals and the start signal to the first constant voltage or the second constant voltage, and then turns off the LCD.

3. The LCD as claimed in claim 1 , wherein the input control module comprises: a fourth transistor, comprising a gate electrically connected to the first clock signal, a drain electrically connected to the scanning signal output by the GOA circuit unit at the previous stage, and a source electrically connected to the controlling node; a fifth transistor, comprising a gate electrically connected to the third clock signal, a drain electrically connected to the controlling node, and a source electrically connected to the scanning signal output by the GOA circuit unit at the next stage.

4. The LCD as claimed in claim 3 , wherein the output control module comprises: a sixth transistor, comprising a gate electrically connected to the second constant voltage, a drain electrically connected to the controlling node, and a source electrically connected to a drain of the third transistor; a seventh transistor, comprising a gate electrically connected to the source of the sixth transistor, a drain electrically connected to the second clock signal, and a source electrically connected to the output terminal; and a capacitor, connected between the source and the gate of the seventh transistor, respectively.

5. The LCD as claimed in claim 1 , wherein the over-current protection circuit is integrated in the level shifter.

6. A liquid crystal display (LCD), comprising: a substrate, comprising a pixel array section and a circuit arrangement section arranged on a first side and a second side of the pixel array section; a plurality of gate on array (GOA) units connected in series, disposed on the circuit arrangement section, for outputting a scanning signal to the pixel array section based on voltage levels of a plurality of clock signals and a voltage level of a start signal; a controller, for generating the plurality of clock signals and the start signal; a level shifter, electrically connected to the controller, for adjusting the voltage levels of the plurality of clock signals and the voltage level of the start signal; and an over-current protection circuit, electrically connected to the level shifter, for outputting an adjusting signal to the controller to turn off the LCD when a magnitude of one of the plurality of clock signals is over a predetermined value, wherein the plurality of clock signals comprise a first clock signal, a second clock signal, and a third clock signal, each of the plurality of GOA circuit units at each stage for outputting a scanning signal at an output terminal according to a scanning signal output by a GOA circuit unit at a previous stage, a scanning signal output by a GOA circuit unit at a next stage, a first constant voltage, a second constant voltage, the first clock signal, the second clock signal, and the third clock signal, wherein each of the plurality of GOA circuit units at each stage comprises: an input control module, for outputting a controlling signal at a controlling node according to the first clock signal and the third clock signal; an output control module, electrically connected to the controlling node, for outputting the scanning signal at the output terminal according to the controlling signal and the second clock signal; and a pull-down module, electrically connected to the output control module, for pulling the scanning signal down to be at low level, wherein the pull-down module comprises: a first transistor, comprising a gate electrically connected to the controlling node, a drain electrically connected to a pull-down driving node, and a source electrically connected to the first constant voltage; a second transistor, comprising a gate electrically connected to the pull-down driving node, a drain electrically connected to the output terminal, and a source electrically connected to the first constant voltage; a third transistor, comprising a gate electrically connected to the pull-down driving node, and a source electrically connected to the first constant voltage; and a resistor, comprising two terminals electrically connected to the second constant voltage and the pull-down driving node, respectively.

7. The LCD as claimed in claim 6 , wherein upon receiving the adjusting signal, the controller switches the clock signals and the start signal to the first constant voltage or the second constant voltage, and then turns off the LCD.

8. The LCD as claimed in claim 6 , wherein upon receiving the adjusting signal, the controller switches the clock signals and the start signal to a floating state, and then turns off the LCD.

9. The LCD as claimed in claim 6 , wherein the input control module comprises: a fourth transistor, comprising a gate electrically connected to the first clock signal, a drain electrically connected to the scanning signal output by the GOA circuit unit at the previous stage, and a source electrically connected to the controlling node; a fifth transistor, comprising a gate electrically connected to the third clock signal, a drain electrically connected to the controlling node, and a source electrically connected to the scanning signal output by the GOA circuit unit at the next stage.

10. The LCD as claimed in claim 6 , wherein the output control module comprises: a sixth transistor, comprising a gate electrically connected to the second constant voltage, a drain electrically connected to the controlling node, and a source electrically connected to a drain of the third transistor; a seventh transistor, comprising a gate electrically connected to the source of the sixth transistor, a drain electrically connected to the second clock signal, and a source electrically connected to the output terminal; and a capacitor, connected between the source and the gate of the seventh transistor, respectively.

11. The LCD as claimed in claim 6 , wherein the over-current protection circuit is integrated in the level shifter.