Dynamic Smt

1. A computer system for simultaneous multithreading in a processor, the computer system comprising: one or more computer processors; one or more non-transitory computer readable storage media; program instructions stored on the one or more non-transitory computer readable storage media for execution by at least one of the one or more computer processors, the program instructions comprising: a sampler configured for measuring an SMT-performance value of a software code, wherein the software code is executed in a simultaneous multithreading mode by the processor, wherein the sampler is also configured for measuring non-SMT-performance value of the software code, wherein the software code is executed in a non-simultaneous multithreading mode by the processor; a comparing module configured for comparing the SMT-performance value with the non-SMT-performance value and validating performance values, in a performance table based on comparing a version of the software code with a version stored in the performance table with regard to the use of performance values in a decision to dispatch in SMT mode or non-SMT mode; and a dispatcher configured for dispatching the software code for an execution mode by the processor, based on the comparing, wherein the execution mode is at least one of SMT-mode or non-SMT-mode, and wherein different portions of the software code can be executed in different execution modes based on resource requirements of the different portions.

2. The computer system of claim 1 , wherein the dispatcher is configured for dispatching the software code for execution by the processor in non-SMT-mode if a difference of the non-SMT-performance and the SMT-performance differs by at least a predefined performance value.

3. The computer system of claim 1 , wherein the sampler is configured for a determination of the SMT-performance value and the non-SMT-performance value before the dispatching.

4. The computer system of claim 1 , wherein the system further comprises performance storage for the performance table for storing the SMT-performance value and the non-SMT-performance value.

5. The computer system of claim 4 , wherein the performance table further comprises at least one of the group comprising a process identifier, a program identifier, a hash value of the software code, a software version, an evaluation flag, a SMT-status-flag, a start identifier of the measured software code and an end identifier of the software code.

6. The computer system of claim 1 , wherein the processor is enabled for execution of at least two parallel threads.

7. The computer system of claim 1 , wherein the dispatcher is configured for blocking of any other thread for the processor, apart from a thread associated with the software code if the software code is dispatched for an execution in non-SMT-mode.

8. The computer system of claim 1 , wherein the SMT-performance value and the non-SMT-performance value is based on a measurement of a value selected from the group comprising a total number of clock cycles required for executing the software code, a time period used for running the software code, a time period for a predefined portion of the software code, an instruction counter value, an input/output access number value, an accumulated input/output time value, a memory access number value, an accumulated memory access number, a number of cache misses and a number of floating point instructions.

9. The computer system of claim 3 , wherein the system is configured for a determination of a hash value associated with the software code before being dispatched, and a determination if the hash value is different than a hash value stored in a performance table.

10. A computer program product for simultaneous multithreading in a processor, the computer program product comprising: one or more non-transitory computer readable storage media and program instructions stored on the one or more non-transitory computer readable storage media, the program instructions comprising: program instructions to, measure SMT-performance value of a software code, wherein the software code is executed in a simultaneous multithreading mode by the processor; program instructions to, measure non-SMT-performance value of the software code, wherein the software code is executed in non-simultaneous multithreading mode by the processor; program instructions to, compare the SMT-performance value with the non-SMT-performance value and validate performance values, in a performance table based on comparing a version of the software code with a version stored in the performance table with regard to the use of performance values in a decision to dispatch in SMT mode or non-SMT mode; and program instructions to, dispatch the software code for an execution mode by the processor depending on the comparison, wherein the execution mode is at least one of SMT-mode and non-SMT-mode, and wherein different portions of the software code can be executed in different execution modes based on resource requirements of the different portions.

11. The computer program product of claim 10 , wherein the dispatcher is configured for dispatching the software code for execution by the processor in non-SMT mode if a difference of the non-SMT-performance and the SMT-performance differs by at least a predefined performance value.

12. The computer program product of claim 10 , wherein the sampler is configured for a determination of the SMT-performance value and the non-SMT performance value before the dispatching.

13. The computer program product of claim 10 , further comprises: program instructions to provide performance storage for storing the SMT performance value and the non-SMT-performance value associated with the performance table.

14. The computer program product of claim 13 , wherein the performance table further comprises at least one of the group comprising a process identifier, a program identifier, a hash value of the software code, a software version, an evaluation flag, a SMT-status-flag, a start identifier of the measured software code and an end identifier of the software code.

15. The computer program product of claim 10 , wherein the processor is enabled for execution of at least two parallel threads.

16. The computer program product of claim 10 , wherein the dispatcher is configured for blocking of any other thread for the processor, apart from a thread associated with the software code if the software code is dispatched for an execution in non-SMT mode.

17. The computer program product of claim 10 , wherein the SMT performance value and the non-SMT-performance value is based on a measurement of a value selected from the group comprising a total number of clock cycles required for executing the software code, a time period used for running the software code, a time period for a predefined portion of the software code, an instruction counter value, an input/output access number value, an accumulated input/output time value, a memory access number value, an accumulated memory access number, a number of cache misses and a number of floating point instructions.

18. The computer program product of claim 12 , wherein the system is configured for a determination of a hash value associated with the software code before being dispatched, and a determination if the hash value is different than a hash value stored in a performance table.