Multiple Input Multiple Output Arbiter Device

1. A method for arbitrating connections between interfaces of one or more devices, the method comprising: determining, at an arbiter device during a given clock cycle, an ordered set corresponding to a plurality of first interfaces, the ordered set indicating whether each first interfaces of the plurality of first interfaces is available for selection for a second interface of a plurality of second interfaces during the given clock cycle; selecting, with the arbiter device during the given clock cycle, a respective available first interface, from the ordered set corresponding to the plurality of first interfaces, for each of the plurality of second interfaces, wherein selecting an available first interface for a particular one of the second interfaces is performed in parallel with and independently from selecting available first interfaces for other ones of the second interfaces; and generating, with the arbiter device during the given clock cycle, an output that indicates the selections of the respective first interfaces for the second interfaces.

2. The method of claim 1 , wherein selecting the respective available first interface from the ordered set corresponding to the plurality of first interfaces includes, determining, for a particular one of the second interfaces, a next available first interface when moving through the ordered set, in a predetermined direction, from a first interface that was selected for the particular second interface in a previous clock cycle that immediately preceded the given clock cycle.

3. The method of claim 1 , wherein the ordered set corresponding to the plurality of first interfaces is an array of binary numbers indexed according to an order of first interfaces, and wherein each binary number is set to (i) a first value to indicate that a corresponding first interface is available for selection or (ii) a second value to indicate that the corresponding first interface is not available for selection.

4. The method of claim 1 , wherein generating the ordered set corresponding to the plurality of first interfaces includes masking first interfaces that are not available for selection for new second interfaces in the given clock cycle, wherein masking is at least in part based on selections made in a previous clock cycle that immediately precedes the given clock cycle.

5. The method of claim 1 , further comprising prior to selecting the respective available first interface, rearranging, with the arbiter device during the given clock cycle, an original order of elements of the ordered set corresponding to the plurality of first interfaces to generate a shuffled ordered set corresponding to the plurality of first interfaces, and wherein selecting the respective available first interface for each second interface comprises selecting the respective first interface from the shuffled ordered set corresponding to the plurality of first interfaces.

6. The method of claim 5 , wherein generating the output that indicates the selections of the respective first interfaces for the second interfaces includes generating a shuffled output set that indicates the selections, and rearranging the shuffled output set according to the original order of elements of the ordered set corresponding to the plurality of first interfaces.

7. The method of claim 6 , wherein rearranging the original order of elements of the ordered set corresponding to the plurality of first interfaces comprises moving each element of the ordered set to an index generated by a pseudorandom number generator, and rearranging the shuffled output set according to the original order of elements of the ordered set corresponding to the plurality of first interfaces comprises moving each element of the shuffled output set to the index generated by the pseudorandom number generator.

8. The method of claim 6 , wherein generating the output that indicates the selections of the respective first interfaces for the second interfaces comprises generating an ordered output set corresponding to the plurality of first interfaces, wherein the ordered output set indicates correspondences between the second interfaces and the respective first interfaces selected for the second interfaces.

9. An arbiter device, comprising: one or more integrated circuits configured to determine, during a given clock cycle, an ordered set corresponding to a plurality of first interfaces, the ordered set indicating whether each first interfaces of the plurality of first interfaces is available for selection for a second interface of a plurality of second interfaces during the given clock cycle; select, during the given clock cycle, a respective available first interface, from the ordered set corresponding to the plurality of first interfaces, for each of the plurality of second interfaces, wherein selecting an available first interface for a particular one of the second interfaces is performed in parallel with and independently from selecting available first interfaces for other ones of the second interfaces; and generate, during the given clock cycle, an output that indicates the selections of the respective first interfaces for the second interfaces.

10. The arbiter device of claim 9 , wherein the one or more integrate circuits are configured to determine, for a particular one of the second interfaces, a next available first interface when moving through the ordered set, in a predetermined direction, from a first interface that was selected for the particular second interface in a previous clock cycle that immediately preceded the given clock cycle.

11. The arbiter device of claim 9 , wherein the ordered set corresponding to the plurality of first interfaces is an array of binary numbers indexed according to an order of first interfaces, and wherein each binary number is set to (i) a first value to indicate that a corresponding first interface is available for selection or (ii) a second value to indicate that the corresponding first interface is not available for selection.

12. The arbiter device of claim 9 , wherein the one or more integrated circuits is are configured to generate the ordered set corresponding to the plurality of first interfaces at least by masking first interfaces that are not available for selection for new second interfaces in the given clock cycle, wherein masking is at least in part based on selections made in a previous clock cycle that immediately precedes the given clock cycle.

13. The arbiter device of claim 9 , wherein the one or more integrated circuits are further configured to prior to selecting the respective available first interface, rearrange an original order of elements of the ordered set corresponding to the plurality of first interfaces to generate a shuffled ordered set corresponding to the plurality of first interfaces, and select the respective available first interface for each second interface from the shuffled ordered set corresponding to the plurality of first interfaces.

14. The arbiter device of claim 9 , wherein the one or more integrated circuits are configured to generate a shuffled output set that indicates the selections, and rearrange the shuffled output set according to the original order of elements of the ordered set corresponding to the plurality of first interfaces to generate an unshuffled output set.

15. The arbiter device of claim 14 , wherein the one or more integrated circuits are configured to generate the output that indicates the selections of the respective first interfaces for the second interfaces at least by generating an ordered output set corresponding to the plurality of first interfaces, wherein the ordered output set indicates correspondences between the second interfaces and the respective first interfaces selected for the second interfaces.

16. A network device, comprising a plurality of ports; a memory device for storing packets received via the plurality of ports, the memory device having a plurality of memory banks; a receive/write device configured to store in the memory device, packets that are received via the plurality of ports, the receive/write device having a plurality of first interfaces coupled to the plurality ports and a plurality of second interfaces coupled to the plurality of memory banks; and an arbiter device coupled to the receive/write device configured to determine, during a given clock cycle, an ordered set corresponding to the plurality of first interfaces of the receive/write device, the ordered set indicating whether each first interfaces of the plurality of first interfaces is available for selection, during the given clock cycle, for a second interface of the plurality of second interfaces of the receive/write device; select, during the given clock cycle, a respective available first interface, from the ordered set corresponding to the plurality of first interfaces, for each of the plurality of second interfaces, wherein selecting an available first interface for a particular one of the second interfaces is performed in parallel with and independently from selecting available first interfaces for other ones of the second interfaces; and generate, during the given clock cycle, an output that indicates the selections of the respective first interfaces for the second interfaces; and provide the output to the receive/write device; wherein the receive/write device is configured to use the output provided by the arbiter device to transfer data received via the first interfaces to selected ones of the second interfaces for writing of the data to the corresponding ones of the memory banks coupled to the second interfaces.

17. The network device of claim 16 , wherein the arbiter device is configured to determine for a particular one of the second interfaces, a next available first interface when moving through the ordered set corresponding to the plurality of first interfaces, in a predetermined direction, from a first interface that was selected for the second interface in a previous clock cycle that immediately preceded the given clock cycle.

18. The network device of claim 16 , wherein the ordered set corresponding to the plurality of first interfaces is an array of binary numbers indexed according to an order of first interfaces, and wherein each binary number is set to (i) a first value to indicate that a corresponding first interface is available for selection or (ii) a second value to indicate that the corresponding first interface is not available for selection.

19. The network device of claim 16 , wherein the one or more integrated circuits are configured to generate the output that indicates the selections of the respective first interfaces for the second interfaces at least by generating an ordered output set corresponding to the plurality of first interfaces, wherein the ordered output set indicates correspondences between the second interfaces and the respective first interfaces selected for the second interfaces.