Phase Compensated Fixed-Point Numerically Controlled Oscillator For Downhole Logging

1. A system comprising: a processor; a downhole device including a configuration module and a real-time module; and a memory having instructions stored thereon, that, if executed by the processor, cause the processor to perform operations comprising: receiving parameters including an input frequency and a compensation value; converting, with the configuration module, based on the parameters, the input frequency to a delta phase value; calculating, with the real-time module, an accumulation error for a digital signal; responsive to determining that the accumulation error is greater than or equal to the compensation value, removing the accumulation error from the digital signal to generate an output signal.

2. The system of claim 1 , the operations further comprising, prior to receiving parameters, calculating the compensation value with the configuration module, wherein the compensation value corresponds to an error tolerance.

3. The system of claim 1 , wherein receiving parameters comprises: receiving a system clock frequency; and calculating, with the configuration module, based on the parameters, configuration settings for the real-time module and an error tolerance for the output signal.

4. The system of claim 1 , wherein calculating the accumulation error includes converting, with the real-time module, the accumulation error into a running counter, the operations further comprising: responsive to determining that the accumulation error is less than the compensation value, incrementing, with the real-time module, the running counter.

5. The system of claim 1 , wherein receiving parameters is performed with the configuration module, and wherein the determining and the removing are performed with the real-time module.

6. The system of claim 1 , further comprising a digital-to-analog converter (DAC), the operations further comprising converting, with the DAC, the output signal to generate an analog output signal.

7. A method comprising: receiving, at a downhole device, parameters including an input frequency and a compensation value; converting, based on the parameters, the input frequency to a delta phase value; calculating, with the downhole device, an accumulation error for a digital signal; and responsive to determining that the accumulation error is greater than or equal to the compensation value, removing the accumulation error from the digital signal to generate an output signal.

8. The method of claim 7 , wherein the compensation value is a pre-determined value corresponding to a calculated error tolerance for the output signal.

9. The method of claim 7 , further comprising, prior to receiving parameters, calculating, with a configuration module of the downhole device, the compensation value, wherein the compensation value corresponds to an error tolerance.

10. The method of claim 7 , wherein receiving parameters comprises: receiving a system clock frequency; and calculating, with a configuration module, based on the parameters, configuration settings for a real-time module of the downhole device and an error tolerance for the output signal.

11. The method of claim 7 , wherein calculating the accumulation error includes converting, with a real-time module of the downhole device, the accumulation error into a running counter, the method further comprising: responsive to determining that the accumulation error is less than the compensation value, incrementing, with the real-time module, the running counter.

12. The method of claim 7 , wherein receiving parameters and converting the input frequency are performed with a configuration module, and wherein the calculating, the determining, and the removing are performed with a real-time module.

13. The method of claim 7 , wherein generating the output signal comprises: converting the delta phase value to an integer value; searching for the integer value in a sine lookup table to determine a sine value for the digital signal; converting the digital signal to an analog signal using a digital-to-analog converter (DAC); and providing the analog signal as the output signal.

14. The method of claim 7 , wherein the calculating and the removing are performed with a phase compensator including a compensation register and a compensation counter.

15. A memory having executable instructions stored therein, that, if executed by a downhole device, cause the downhole device to perform operations, the instructions comprising: instructions for receiving parameters including an input frequency and a compensation value; instructions for converting, based on the parameters, the input frequency to a delta phase value; instructions for calculating an accumulation error for a digital signal; and responsive to determining that the accumulation error is greater than or equal to the compensation value, instructions for removing the accumulation error from the digital signal to generate an output signal.

16. The memory of claim 15 , wherein the compensation value is a pre-determined value corresponding to a calculated error tolerance for the output signal.

17. The memory of claim 15 , wherein the instructions for receiving parameters comprise: instructions for receiving a system clock frequency; and instructions for calculating, with a configuration module, based on the parameters, configuration settings for a real-time module and an error tolerance for the output signal.

18. The memory of claim 15 , wherein the instructions for calculating comprise instructions for converting, with a real-time module, the accumulation error into a running counter.

19. The memory of claim 18 , the instructions further comprising: responsive to determining that the accumulation error is less than the compensation value, instructions for incrementing, with the real-time module, the running counter.

20. The memory of claim 15 , wherein the instructions for generating the output signal comprise: instructions for converting the delta phase value to an integer value; instructions for searching for the integer value in a sine lookup table to determine a sine value for the digital signal; instructions for converting the digital signal to an analog signal using a digital-to-analog converter (DAC); and instructions for providing the analog signal as the output signal.