System and Method for Routing

1. A system for processing input data packets, the system having a plurality of output ports and comprising: a state machine comprising: a state register; and combinational logic, the state machine being configured to: receive an input data packet; and remove from the input data packet a header containing an output port identifier identifying an output port of the plurality of output ports, to form a shortened packet; the system being configured to output the shortened packet through the identified output port, the system further comprising an input first-in, first-out structure (input FIFO), the state machine being configured to receive the input data packet from the input FIFO, the system further comprising an output first-in, first-out structure (output FIFO), the state machine being configured to feed the shortened packet to the output FIFO, wherein the state machine is configured to process input Ethernet data packets, each input Ethernet data packet including an Ethernet header and one or more Multiprotocol Label Switching (MPLS) headers, and wherein the header is the first MPLS header of the one or more MPLS headers, wherein the state machine is further configured to: remove from an input Ethernet data packet an MPLS header, to form a shortened packet; and feed the shortened packet to the output FIFO, when an Ethertype field of the Ethernet header has a value of hexadecimal 8847; and feed the input Ethernet data packet to the output FIFO, when an Ethertype field of the Ethernet header does not have a value of hexadecimal 8847.

2. The system of claim 1 , wherein the state machine is configured to receive the input Ethernet data packet from the input FIFO one input data word at a time.

3. The system of claim 2 , wherein the length of each input data word is 256 bits.

4. The system of claim 2 , wherein the state machine is configured to feed to the output FIFO a sequence of output data words, each of the output data words consisting of a part of a first input data word received from the input FIFO and a part of a second input word received from the input FIFO after the first input data word.

5. The system of claim 4 , further comprising a demultiplexer to convert, at the input of the system, a first data stream carrying the input Ethernet data packets, to a second data stream, having a greater width and a lower clock speed than the first data stream, the system being configured to feed the second data stream to the input FIFO.

6. The system of claim 5 , wherein the input FIFO is an asynchronous FIFO.

7. A system for processing input data packets, the system having a plurality of output ports and comprising: a state machine comprising: a state register; and combinational logic, the state machine being configured to: receive an input data packet; and remove from the input data packet a header containing an output port identifier identifying an output port of the plurality of output ports, to form a shortened packet; the system being configured to output the shortened packet through the identified output port, the system further comprising an input first-in, first-out structure (input FIFO), the state machine being configured to receive the input data packet from the input FIFO, the system further comprising an output first-in, first-out structure (output FIFO), the state machine being configured to feed the shortened packet to the output FIFO, wherein the state machine is configured to process input Ethernet data packets, each input Ethernet data packet including an Ethernet header and one or more Multiprotocol Label Switching (MPLS) headers, and wherein the header is the first MPLS header of the one or more MPLS headers, wherein the state machine is configured to receive the input Ethernet data packet from the input FIFO one input data word at a time, wherein the state machine is configured to feed to the output FIFO a sequence of output data words, each of the output data words consisting of a part of a first input data word received from the input FIFO and a part of a second input word received from the input FIFO after the first input data word, the system further comprising a demultiplexer to convert, at the input of the system, a first data stream carrying the input Ethernet data packets, to a second data stream, having a greater width and a lower clock speed than the first data stream, the system being configured to feed the second data stream to the input FIFO, wherein the state machine is configured, when the first MPLS header of the Ethernet packet is not the only MPLS header of the Ethernet packet, upon receiving a final input data word of the packet containing the end of a data packet, to combine the final input data word with a part of the previous input data word to form an output data word, when the length of valid data in the final input data word is not greater than the length of the first MPLS header, and combine a part of the final input data word with a part of the previous input data word to form an output data word; and form a final output data word from the remainder of the final input data word, when the length of valid data in the final input data word is less than the length of the first MPLS header.

8. The system of claim 1 , wherein the outputting of the shortened packet through the identified output port comprises extracting the output port identifier from a portion of the first MPLS header.

9. The system of claim 8 , wherein the portion of the first MPLS header is the MPLS label portion of the first MPLS header.

10. The system of claim 1 , wherein the state machine is further configured to remove from the input Ethernet data packet a codeword, when the Ethertype field of the Ethernet header has a value of hexadecimal 8847 and the first MPLS header is the only MPLS header of the Ethernet packet.