Legal claims defining the scope of protection. Each claim is shown in both the original legal language and a plain English translation.
1. A computer-implemented method for use in a non-linear system associated with an electronic circuit design comprising: simulating an electronic circuit design; identifying the non-linear system associated with the electronic circuit design; determining a degree of severity of non-linearity of the non-linear system associated with the electronic circuit design; if the degree of severity is less than a predefined threshold, receiving a random input pattern and deriving a single impulse response characterization, wherein the random input pattern is based upon, at least in part, an electronic circuit simulation associated with the electronic circuit design; and if the degree of severity is higher than a predefined threshold, receiving a random input stream having a plurality of patterns and deriving multiple pattern-dependent impulse response characterizations.
This invention relates to a computer-implemented method for analyzing non-linear systems in electronic circuit designs. The method addresses the challenge of accurately characterizing non-linear behavior in electronic circuits, which is critical for performance validation and optimization. Traditional linear analysis techniques fail to capture the complex interactions in non-linear systems, leading to inaccuracies in simulation and design verification. The method begins by simulating an electronic circuit design to identify non-linear systems within it. It then evaluates the degree of non-linearity severity in these systems. If the non-linearity is below a predefined threshold, the method uses a random input pattern to derive a single impulse response characterization. This pattern is based on an electronic circuit simulation, ensuring relevance to the design. For more severe non-linearities exceeding the threshold, the method employs a random input stream with multiple patterns to derive multiple pattern-dependent impulse response characterizations. This adaptive approach ensures accurate modeling of both mild and extreme non-linear behaviors, improving the reliability of circuit analysis. The technique enhances the precision of electronic circuit simulations by dynamically adjusting the characterization method based on non-linearity severity, addressing a key limitation in traditional linear analysis approaches.
2. The computer-implemented method of claim 1 , wherein the multiple pattern-dependent impulse response characterizations are automatically generated for all prior combinations of bits.
This invention relates to digital signal processing, specifically methods for generating pattern-dependent impulse response characterizations in communication systems. The problem addressed is the need to accurately model and compensate for signal distortions caused by intersymbol interference (ISI) and other channel effects that vary depending on the sequence of transmitted bits. Traditional methods often rely on fixed or precomputed impulse responses, which may not adequately capture the dynamic behavior of real-world communication channels. The method involves automatically generating multiple pattern-dependent impulse response characterizations for all prior combinations of bits. This means that for every possible sequence of bits that could be transmitted, the system computes a unique impulse response that reflects how the channel will distort that specific sequence. By considering all prior bit combinations, the method ensures that the impulse response accurately represents the channel's behavior for any given input pattern. This approach improves signal equalization and error correction by providing a more precise model of the channel's response to different bit sequences. The generated impulse responses are used to adjust the transmitted or received signals to compensate for distortions, thereby enhancing communication reliability. The method is particularly useful in high-speed data transmission systems where signal integrity is critical, such as in wired or wireless communication networks. By dynamically adapting to the channel's behavior, the system can achieve better performance compared to static or less detailed impulse response models.
3. The computer-implemented method of claim 2 , further comprising: providing the multiple pattern-dependent impulse response characterizations to one or more algorithmic modeling interface (“AMI”) models associated with an electronic design application.
This invention relates to electronic design automation (EDA), specifically improving signal integrity analysis in high-speed digital circuits. The problem addressed is the need for accurate modeling of signal behavior in complex interconnects, where traditional methods fail to capture pattern-dependent effects that impact timing and signal integrity. The method involves generating multiple pattern-dependent impulse response characterizations for a signal path in an integrated circuit. These characterizations account for variations in signal behavior based on different input patterns, which are critical for high-speed designs where signal transitions depend on prior states. The method includes simulating the signal path under various input conditions to capture these dependencies, then generating impulse response models that reflect how the signal responds to different input patterns. These pattern-dependent impulse response models are then provided to one or more algorithmic modeling interface (AMI) models used in electronic design applications. AMI models are standardized interfaces that allow EDA tools to incorporate advanced modeling techniques for signal integrity analysis. By integrating these pattern-dependent models, the EDA tools can more accurately simulate signal behavior, improving timing analysis and reducing design errors in high-speed digital circuits. This approach enhances the accuracy of signal integrity predictions, particularly in designs where traditional linear models are insufficient.
4. The computer-implemented method of claim 3 , wherein the one or more AMI models are used with an Input/output Buffer Information Specification (“IBIS”) specification compliant simulator.
This invention relates to computer-implemented methods for simulating electronic circuits using Artificial Intelligence/Machine Learning (AI/ML) models in conjunction with Input/Output Buffer Information Specification (IBIS) compliant simulators. The problem addressed is the need for accurate and efficient simulation of electronic circuits, particularly in scenarios where traditional simulation methods are computationally expensive or time-consuming. The method involves using one or more AI/ML models to enhance the performance of IBIS-compliant simulators. These models are trained to predict circuit behavior, such as signal integrity, timing, and power consumption, with high accuracy. The AI/ML models can be integrated into the simulation workflow to replace or supplement traditional simulation techniques, reducing the computational burden while maintaining or improving accuracy. The AI/ML models are trained using historical simulation data, experimental measurements, or a combination of both. The training process ensures that the models can generalize well to new circuit designs and operating conditions. Once trained, the models are deployed within the IBIS-compliant simulator to provide real-time or near-real-time predictions during the simulation process. The integration of AI/ML models with IBIS-compliant simulators allows for faster simulation times, enabling engineers to iterate more quickly on circuit designs. This approach is particularly useful in high-speed digital and mixed-signal circuit design, where signal integrity and timing analysis are critical. The method can be applied to various types of circuits, including but not limited to integrated circuits, printed circuit boards, and system-on-chip designs.
5. The computer-implemented method of claim 1 , further comprising: generating a channel simulation waveform.
This invention relates to wireless communication systems, specifically to methods for simulating and analyzing communication channels to improve signal transmission and reception. The problem addressed is the need for accurate and efficient channel simulation to evaluate the performance of wireless communication systems under various conditions. The method involves generating a channel simulation waveform that models the effects of a wireless communication channel on transmitted signals. This waveform accounts for factors such as multipath propagation, fading, and noise, which can degrade signal quality. By simulating these effects, the method enables the assessment of how well a communication system performs in real-world scenarios. The simulation waveform is derived from a set of channel parameters, which may include path loss, delay spread, and Doppler shift. These parameters are used to create a mathematical model of the channel, which is then applied to a transmitted signal to produce the simulation waveform. The waveform can be used to test the robustness of modulation schemes, error correction techniques, and other signal processing methods. The method also includes analyzing the simulation waveform to identify potential issues in signal transmission and reception. This analysis may involve measuring metrics such as bit error rate, signal-to-noise ratio, and spectral efficiency. The results can be used to optimize system design, improve signal processing algorithms, and enhance overall communication performance. By providing a realistic simulation of wireless channels, this method supports the development and testing of advanced communication technologies, including 5G and beyond. It helps engineers evaluate system performance without the need for expensive a
6. The computer-implemented method of claim 1 , wherein the random input pattern is a pseudorandom binary sequence (“PRBS”).
This invention relates to computer-implemented methods for generating and using pseudorandom binary sequences (PRBS) in testing or verification systems. The method involves producing a PRBS as a random input pattern for evaluating the performance, reliability, or functionality of electronic circuits, communication systems, or other digital devices. PRBS is a deterministic sequence that appears random, making it useful for stress-testing hardware or software components under controlled conditions. The sequence is generated using a linear feedback shift register (LFSR) or similar algorithm, ensuring reproducibility while simulating randomness. This approach helps identify errors, vulnerabilities, or performance bottlenecks in systems that must handle unpredictable data streams. The PRBS can be applied in various applications, including signal integrity testing, error detection in communication protocols, or validation of cryptographic algorithms. By using a PRBS, the method ensures consistent and repeatable testing while maintaining the statistical properties of randomness, which is critical for thorough system validation. The invention improves upon traditional random testing by providing a structured yet unpredictable input pattern, enhancing the reliability of test results.
7. A non-transitory computer-readable storage medium having stored thereon instructions that when executed by a machine result in the following operations: simulating an electronic circuit design; identifying a non-linear system associated with an electronic circuit design; determining a degree of severity of non-linearity of the non-linear system associated with the electronic circuit design; and if the degree of severity is less than a predefined threshold, receiving a random input pattern and deriving a single impulse response characterization, wherein the random input pattern is based upon, at least in part, an electronic circuit simulation associated with the electronic circuit design; and if the degree of severity is higher than a predefined threshold, receiving a random input stream having a plurality of patterns and deriving multiple pattern-dependent impulse response characterizations.
This invention relates to electronic circuit design simulation, specifically addressing the challenge of accurately characterizing non-linear systems in circuit designs. Non-linear systems in electronic circuits can exhibit complex behaviors that are difficult to model using traditional linear analysis techniques. The invention provides a method to simulate an electronic circuit design and analyze its non-linear components. The system first identifies non-linear systems within the circuit design and evaluates the degree of severity of their non-linearity. If the non-linearity is below a predefined threshold, the system uses a random input pattern to derive a single impulse response characterization, where the input pattern is based on an electronic circuit simulation. If the non-linearity exceeds the threshold, the system employs a random input stream with multiple patterns to derive multiple pattern-dependent impulse response characterizations. This approach ensures accurate modeling of both mildly and highly non-linear systems, improving the reliability of circuit simulations. The method is implemented via a non-transitory computer-readable storage medium containing executable instructions for performing these operations.
8. The computer-readable storage medium of claim 7 , wherein the multiple pattern-dependent impulse response characterizations are automatically generated for all prior combinations of bits.
This invention relates to digital signal processing, specifically improving the accuracy of signal transmission in communication systems by characterizing and compensating for pattern-dependent distortions. The problem addressed is the variability in signal response caused by prior bit patterns, which can degrade performance in high-speed data transmission systems. The solution involves generating multiple pattern-dependent impulse response characterizations for all prior combinations of bits. These characterizations are used to model how previous bit sequences affect the current signal, allowing for precise compensation. The system automatically generates these characterizations, ensuring comprehensive coverage of all possible bit combinations. This approach enhances signal integrity by accounting for inter-symbol interference and other distortions that arise from the dependency of the impulse response on prior bit patterns. The method is particularly useful in high-speed serial links, optical communications, and other systems where signal fidelity is critical. By dynamically adjusting the signal based on the generated characterizations, the invention improves data transmission accuracy and reliability. The automatic generation of these characterizations ensures adaptability to different transmission conditions and reduces the need for manual calibration. This technique is applicable in various communication protocols and can be integrated into existing signal processing frameworks to enhance performance.
9. The computer-readable storage medium of claim 8 , further comprising: providing the multiple pattern-dependent impulse response characterizations to one or more algorithmic modeling interface (“AMI”) models associated with an electronic design application.
The invention relates to electronic design automation (EDA) and specifically to improving signal integrity analysis in high-speed digital circuits. The problem addressed is the need for accurate modeling of signal distortions caused by complex interconnect patterns in printed circuit boards (PCBs) and integrated circuits (ICs). Traditional methods often rely on simplified models that fail to capture the full range of distortions introduced by varying interconnect geometries and materials. The invention provides a solution by generating multiple pattern-dependent impulse response characterizations for different interconnect patterns. These characterizations are derived from electromagnetic simulations or measurements, capturing how signals propagate through specific interconnect structures. The impulse responses are then provided to one or more algorithmic modeling interface (AMI) models, which are used within electronic design applications. AMI models are specialized models that allow for dynamic simulation of signal integrity effects, such as reflections, crosstalk, and dispersion, during circuit design and verification. By integrating these detailed impulse response characterizations into AMI models, the invention enables more accurate and efficient signal integrity analysis. This allows designers to better predict signal behavior in complex interconnect environments, reducing the risk of design errors and improving overall circuit performance. The approach is particularly useful in high-speed digital designs where signal integrity is critical.
10. The computer-readable storage medium of claim 9 , wherein the one or more AMI models are used with an Input/output Buffer Information Specification (“IBIS”) specification compliant simulator.
A system and method for electronic circuit design involves using Artificial Intelligence/Machine Learning (AI/ML) models to analyze and optimize circuit behavior. The technology addresses the challenge of accurately simulating and validating high-speed electronic circuits, particularly in the context of signal integrity and power integrity analysis. Traditional simulation methods often struggle with computational efficiency and accuracy, especially for complex designs. The invention employs one or more AI/ML models to predict circuit performance metrics, such as signal distortion, timing errors, and power consumption. These models are integrated with an Input/Output Buffer Information Specification (IBIS) compliant simulator, which is a standardized modeling approach for electronic components. The IBIS-compliant simulator provides a framework for accurately representing the electrical behavior of integrated circuits, allowing the AI/ML models to leverage this data for improved predictions. The AI/ML models are trained on historical simulation data, enabling them to learn patterns and relationships between circuit parameters and performance outcomes. By combining AI/ML with IBIS-compliant simulation, the system enhances the speed and accuracy of circuit analysis, reducing the need for extensive manual testing and iterative design cycles. This approach is particularly useful in high-speed digital and mixed-signal circuit design, where precise signal integrity analysis is critical. The invention aims to streamline the design process while maintaining high levels of accuracy in performance predictions.
11. The computer-readable storage medium of claim 7 , further comprising: generating a channel simulation waveform.
A system and method for wireless communication signal processing involves generating a channel simulation waveform to evaluate and optimize signal transmission in wireless networks. The technology addresses challenges in accurately modeling real-world propagation conditions, which are critical for testing and validating wireless communication systems. The channel simulation waveform is designed to replicate the effects of multipath fading, interference, and other environmental factors that impact signal integrity. This waveform is used to simulate various channel conditions, allowing engineers to assess performance under different scenarios without physical testing. The system integrates with existing wireless communication protocols to provide realistic simulations for both uplink and downlink transmissions. By generating these waveforms, the technology enables more efficient development and deployment of wireless systems, reducing the need for extensive field testing while ensuring reliable performance. The approach is particularly useful for 5G and beyond networks, where complex channel conditions require precise modeling to maintain high data rates and low latency. The generated waveforms can be adjusted dynamically to reflect changing environmental conditions, improving the accuracy of simulations and supporting the optimization of signal processing algorithms. This method enhances the reliability and efficiency of wireless communication systems by providing a controlled yet realistic testing environment.
12. The computer-readable storage medium of claim 7 , wherein the random input pattern is a pseudorandom binary sequence (“PRBS”).
A system and method for generating and analyzing random input patterns in electronic testing, particularly for verifying the integrity and performance of digital circuits. The technology addresses the challenge of ensuring reliable testing of high-speed digital systems by providing a controlled yet unpredictable input pattern to evaluate circuit behavior under varying conditions. The invention utilizes a pseudorandom binary sequence (PRBS) as the random input pattern, which is a deterministic yet statistically random sequence generated algorithmically. This approach allows for repeatable testing while simulating real-world randomness, making it suitable for applications such as built-in self-test (BIST) and automated test equipment (ATE). The PRBS is generated using a linear feedback shift register (LFSR) or similar hardware, ensuring efficient generation and synchronization with the circuit under test. The system may also include error detection mechanisms to compare the output of the circuit against expected results, identifying potential faults or performance issues. The use of PRBS patterns enhances test coverage by exposing edge cases and race conditions that deterministic patterns might miss, improving overall test effectiveness. This method is particularly valuable in fields such as semiconductor manufacturing, telecommunications, and high-performance computing, where signal integrity and reliability are critical.
13. A system for use in a non-linear system associated with an electronic circuit design comprising: a computing device configured to simulate an electronic circuit design and identify the non-linear system associated with the electronic circuit design and to determine a degree of severity of non-linearity of the non-linear system associated with the electronic circuit design, wherein if the degree of severity is less than a predefined threshold, the computing device is further configured to receive a random input pattern and derive a single impulse response characterization, wherein the random input pattern is based upon, at least in part, an electronic circuit simulation associated with the electronic circuit design and if the degree of severity is higher than a predefined threshold, the computing device is further configured to receive a random input stream having a plurality of patterns and deriving multiple pattern-dependent impulse response characterizations.
This system addresses the challenge of analyzing non-linear systems in electronic circuit designs, where traditional linear analysis methods fail to accurately model behavior. The system uses a computing device to simulate an electronic circuit design and identify non-linear components within it. It then evaluates the severity of non-linearity by comparing it to a predefined threshold. If the non-linearity is below the threshold, the system generates a random input pattern based on the circuit simulation and derives a single impulse response characterization, simplifying analysis. For higher non-linearity, the system uses a random input stream with multiple patterns to derive multiple pattern-dependent impulse responses, accounting for varying behavior across different inputs. This approach ensures accurate modeling of both mildly and highly non-linear circuits, improving design verification and performance prediction. The system dynamically adapts its analysis method based on non-linearity severity, optimizing computational efficiency and accuracy.
14. The system of claim 13 , wherein the multiple pattern-dependent impulse response characterizations are automatically generated for all prior combinations of bits.
A system for signal processing in communication networks addresses the challenge of accurately characterizing impulse responses in high-speed data transmission systems. The system generates multiple pattern-dependent impulse response characterizations for all prior combinations of bits, enabling precise modeling of signal distortions caused by varying data patterns. This is particularly useful in scenarios where signal integrity is affected by inter-symbol interference (ISI) or other pattern-dependent effects. The system automatically computes these characterizations, eliminating the need for manual calibration or pre-defined templates. By analyzing historical bit combinations, the system dynamically adjusts its response to optimize signal fidelity. This approach improves error correction and data recovery in high-speed communication channels, such as those used in fiber optics, wireless networks, or backplane interconnects. The system integrates with existing signal processing architectures, enhancing their performance without requiring significant hardware modifications. The automatic generation of impulse response characterizations ensures real-time adaptability to changing channel conditions, making it suitable for modern communication systems that demand high reliability and low latency.
15. The system of claim 14 , wherein the one or more processors are further configured to: provide the multiple pattern-dependent impulse response characterizations to one or more algorithmic modeling interface (“AMI”) models associated with an electronic design application.
This invention relates to electronic design automation (EDA) systems, specifically improving signal integrity analysis in high-speed digital circuits. The system addresses the challenge of accurately modeling signal behavior in complex interconnects, where traditional methods fail to account for variations in manufacturing processes, material properties, and geometric tolerances. The invention provides a solution by generating multiple pattern-dependent impulse response characterizations for interconnects, capturing how different signal patterns affect transmission behavior. These characterizations are derived from physical measurements or simulations of the interconnects under various operating conditions. The system then supplies these pattern-dependent impulse responses to one or more algorithmic modeling interface (AMI) models within an electronic design application. AMI models are used to simulate signal integrity in high-speed circuits, and by incorporating these detailed impulse responses, the system enables more accurate modeling of real-world signal behavior. This improves the reliability of signal integrity analysis, reducing design errors and rework in electronic circuit development. The approach is particularly valuable for high-speed serial links, where signal integrity is critical.
16. The system of claim 15 , wherein the one or more AMI models are used with an Input/output Buffer Information Specification (“IBIS”) specification compliant simulator.
The invention relates to a system for simulating and analyzing electronic circuits, particularly focusing on the use of Advanced Machine Learning (AML) models in conjunction with Input/Output Buffer Information Specification (IBIS) compliant simulators. The system addresses the challenge of accurately modeling and simulating the behavior of electronic components, especially in high-speed digital circuits where signal integrity and timing are critical. The system includes one or more AML models that are trained to predict the behavior of electronic components under various operating conditions. These models are integrated with an IBIS-compliant simulator, which is a standardized method for characterizing the electrical behavior of integrated circuits. The AML models enhance the simulator's accuracy by providing more precise predictions of component behavior, particularly in scenarios where traditional simulation methods may be less reliable. The system further includes a data processing module that processes input data, such as circuit schematics, component specifications, and environmental conditions, to generate simulation parameters. The AML models then use these parameters to predict the behavior of the components, which is fed back into the IBIS-compliant simulator for further analysis. This iterative process improves the overall accuracy of the simulation and helps identify potential issues in the circuit design before physical prototyping. The invention aims to provide a more efficient and accurate method for simulating electronic circuits, reducing the need for costly and time-consuming physical testing. By leveraging AML models and IBIS-compliant simulators, the system offers a robust solution for ensuring signal integrity and performance in modern electronic
17. The system of claim 13 , wherein the one or more processors are further configured to: generate a channel simulation waveform.
A system for signal processing in communication networks addresses the challenge of accurately simulating and analyzing signal propagation in complex environments. The system includes one or more processors configured to generate a channel simulation waveform, which models the behavior of signals as they travel through a communication channel. This waveform accounts for factors such as multipath fading, interference, and noise, providing a realistic representation of real-world signal conditions. The processors also perform signal analysis, including extracting features from the waveform to assess signal quality, detect anomalies, and optimize transmission parameters. The system may further include a memory for storing simulation data and a user interface for configuring simulation parameters and visualizing results. By simulating channel conditions, the system enables the development and testing of communication protocols, antenna designs, and signal processing algorithms under various environmental scenarios, improving reliability and performance in wireless networks. The channel simulation waveform can be used to evaluate the impact of different modulation schemes, error correction techniques, and transmission power levels, ensuring robust communication in diverse operating conditions.
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December 3, 2019
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