Interference Testing

1. A controller, comprising logic, at least partially including hardware logic, configured to: receive a predetermined reload rate parameter and a save rate parameter from a memory location; generate a first set of repeating pseudo-random patterns by reloading a first seed according to the predetermined reload rate parameter; and transmit the first set of repeating pseudo-random patterns on a first lane of a communication interconnect, wherein the logic is further configured to save the first seed in accordance with the save rate.

2. The controller of claim 1 , wherein the logic is configured to: generate a first pseudo-random pattern; and repeat a subset of the first pseudo-random pattern in accordance with the predetermined reload rate parameter; and transmit the subset of the pseudo-random pattern on the communication interconnect.

3. The controller of claim 1 , wherein the logic is configured to execute at least one of: a predetermined number of testing loops; or a predetermined wait period.

4. An electronic device, comprising: at least one processing component; and a controller, comprising: logic, at least partially including hardware logic, configured to: receive a predetermined reload rate parameter and a save rate parameter from a memory location; generate a first set of repeating pseudo-random patterns by reloading a first seed according to the predetermined reload rate parameter; and transmit the first set of repeating pseudo-random patterns on a first lane of a communication interconnect, wherein the logic is further configured to save the first seed in accordance with the save rate.

5. The electronic device of claim 4 , wherein the logic is configured to: generate a first pseudo-random pattern; and repeat a subset of the first pseudo-random pattern in accordance with the predetermined reload rate parameter; and transmit the subset of the pseudo-random pattern on the communication interconnect.

6. The controller of claim 4 , wherein the logic is configured to execute at least one of: a predetermined number of testing loops; or a predetermined wait period.

7. A computer program product comprising logic instructions stored on a non-transitory computer readable medium which, when executed by a controller, configure the controller to: receive a predetermined reload rate parameter and a save rate parameter from a memory location; generate a first set of repeating pseudo-random patterns by reloading a first seed according to the predetermined reload rate parameter; and transmit the first set of repeating pseudo-random patterns on a first lane of a communication interconnect, wherein the logic instructions configure the controller to save the first seed in accordance with the save rate.

8. The computer program product of claim 7 , wherein the logic is further configured to: generate a first pseudo-random pattern; and repeat a subset of the first pseudo-random pattern in accordance with the predetermined reload rate parameter; and transmit the subset of the pseudo-random pattern on the communication interconnect.

9. The computer program product of claim 7 , wherein the logic is further configured to execute at least one of: a predetermined number of testing loops; or a predetermined wait period.