Legal claims defining the scope of protection. Each claim is shown in both the original legal language and a plain English translation.
1. A display device comprising: a first pixel having a first sub-pixel, a second sub-pixel, and a third sub-pixel in a display region; a second pixel having a first sub-pixel, a second sub-pixel and a third sub-pixel in the display region; a first signal line switch circuit having a first source line, a second source line, a first drain line, a second drain line, and a third drain line; and a second signal line switch circuit having a first source line, a second source line, a first drain line, a second drain line, and a third drain line, wherein the second pixel is adjacent to the first pixel in a first direction, the second signal line switch circuit is adjacent to the first signal line switch circuit in the first direction, in the first signal line switch circuit, the first drain line, the first source line, the second drain line, the second source line, and the third drain line are arranged in this order in the first direction, in the second signal line switch circuit, the first drain line, the first source line, the second drain line, the second source line, and the third drain line are arranged in this order in the first direction, the first drain line of the first signal line switch circuit connects to the first sub-pixel of the first pixel by a first signal line, the second drain line of the first signal line switch circuit connects to the second sub-pixel of the second pixel by a second signal line, the third drain line of the first signal line switch circuit connects to the third sub-pixel of the first pixel by a third signal line, the first drain line of the second signal line switch circuit connects to the first sub-pixel of the second pixel by a fourth signal line, the second drain line of the second signal line switch circuit connects to the second sub-pixel of the first pixel by a fifth signal line, the third drain line of the second signal line switch circuit connects to the third sub-pixel of the second pixel by a sixth signal line, the second signal line intersects with the third signal line, the fourth signal line, and the fifth signal line, the fifth signal line intersects with the second signal line, the third signal line, and the fourth signal line.
This invention relates to a display device with an improved signal line switch circuit configuration to reduce signal interference and enhance display quality. The device includes a display region with multiple pixels, each containing three sub-pixels. Adjacent pixels are arranged in a first direction, and each pixel is connected to a signal line switch circuit. Each switch circuit has three drain lines and two source lines, arranged in a specific order in the first direction. The first signal line switch circuit connects to the first and third sub-pixels of the first pixel and the second sub-pixel of the second pixel, while the second signal line switch circuit connects to the first and third sub-pixels of the second pixel and the second sub-pixel of the first pixel. Signal lines from these circuits intersect in a controlled manner to minimize cross-talk and signal interference. The arrangement ensures efficient signal routing while maintaining spatial efficiency, improving display performance by reducing signal delays and enhancing color accuracy. This design is particularly useful in high-resolution displays where signal integrity is critical.
2. The display device of claim 1 , wherein the second signal line, the third signal line, the fourth signal line, and the fifth signal line are between the first signal line and the sixth signal line.
Technical Summary: This invention relates to display devices, specifically addressing signal line arrangements to improve display performance and reduce interference. The device includes multiple signal lines for transmitting data and control signals to display elements. The key improvement involves positioning a second, third, fourth, and fifth signal line between a first signal line and a sixth signal line. This arrangement helps minimize signal crosstalk and interference, ensuring more stable and accurate signal transmission across the display. The signal lines may carry different types of signals, such as data, clock, or synchronization signals, depending on the display technology used. By strategically placing these lines between the first and sixth signal lines, the device achieves better signal integrity and reduces electromagnetic interference, leading to improved display quality and reliability. This configuration is particularly useful in high-resolution or high-refresh-rate displays where signal interference can degrade performance. The invention focuses on optimizing the physical layout of signal lines to enhance overall display functionality.
3. The display device of claim 2 , wherein in the first pixel, the second sub-pixel is between the first sub-pixel and the third sub-pixel, in the second pixel, the second sub-pixel is between the first sub-pixel and the third sub-pixel, and the first sub-pixel of the second pixel is adjacent to the third sub-pixel of the first pixel in the first direction.
This invention relates to display devices, specifically to the arrangement of sub-pixels within pixels to improve display quality. The problem addressed is optimizing sub-pixel positioning to enhance resolution, color accuracy, and visual perception without increasing the number of physical pixels. The display device includes an array of pixels, each containing three sub-pixels: a first sub-pixel, a second sub-pixel, and a third sub-pixel. In each pixel, the second sub-pixel is positioned between the first and third sub-pixels. Adjacent pixels are arranged such that the first sub-pixel of one pixel is next to the third sub-pixel of the neighboring pixel in a first direction (likely horizontal). This staggered arrangement helps reduce color fringing and improves sub-pixel rendering, particularly for diagonal lines and text, by leveraging the human eye's ability to blend colors from nearby sub-pixels. The sub-pixels may correspond to different color channels, such as red, green, and blue, though the specific colors are not explicitly stated. The described layout ensures that each sub-pixel type is evenly distributed across the display, minimizing color artifacts and enhancing perceived resolution. This arrangement is particularly useful in high-resolution displays where individual sub-pixels are densely packed, as it optimizes color mixing and reduces visible pixelation. The invention focuses on the spatial relationship between sub-pixels within and across adjacent pixels to achieve these improvements.
4. The display device of claim 3 , wherein in the first signal line switch circuit, the first source line and the second source line are those in which a source line branches into two, and in the second signal line switch circuit, the first source line and the second source line are those in which a source line branches into two.
This invention relates to display devices, specifically addressing the challenge of efficiently routing signal lines in display panels to reduce wiring complexity and improve manufacturing yield. The device includes a signal line switch circuit that selectively connects source lines to data lines, allowing for flexible routing of display signals. The circuit comprises a first signal line switch circuit and a second signal line switch circuit, each configured to branch a single source line into two separate source lines. This branching enables the display device to distribute signals more efficiently, reducing the number of required signal lines and minimizing potential wiring errors. The branching structure allows for redundancy and improved fault tolerance, ensuring reliable signal transmission across the display panel. By integrating these switch circuits, the display device can optimize signal routing, enhance manufacturing efficiency, and reduce the risk of defects caused by complex wiring. The invention is particularly useful in high-resolution displays where minimizing signal line congestion is critical. The branching mechanism ensures that signals are correctly routed to their intended destinations, improving overall display performance and reliability.
5. The display device of claim 4 , wherein the first signal line switch circuit further having a first gate line, a second gate line, a third gate line, the second signal line switch circuit further having a first gate line, a second gate line, a third gate line, in the first signal line switch circuit, the first gate line is between the first drain line and the first source line, the second gate line is between the first drain line and the second drain line, and the third gate line is between the second source line and the third drain line, and in the second signal line switch circuit, the first gate line is between the first drain line and the first source line, the second gate line is between the first drain line and the second drain line, and the third gate line is between the second source line and the third drain line.
This invention relates to display devices, specifically to the arrangement of signal line switch circuits used in display panels. The problem addressed is the efficient routing and control of signal lines in display panels, particularly in configurations where multiple gate lines are used to manage signal flow between source and drain lines. The invention describes a display device with two signal line switch circuits, each containing three gate lines. In the first signal line switch circuit, the first gate line is positioned between a first drain line and a first source line, the second gate line is between the first drain line and a second drain line, and the third gate line is between a second source line and a third drain line. The second signal line switch circuit has an identical arrangement, with its first gate line between a first drain line and a first source line, the second gate line between the first drain line and a second drain line, and the third gate line between a second source line and a third drain line. This configuration ensures precise control over signal routing, improving display performance by minimizing signal interference and optimizing signal transmission paths. The invention is particularly useful in high-resolution or high-speed display applications where signal integrity and efficient routing are critical.
6. The display device of claim 5 , wherein the first signal line switch circuit further having a first semiconductor film and the second semiconductor film separated from the first semiconductor film, the second signal line switch circuit further having a first semiconductor film and the second semiconductor film separated from the first semiconductor film, in the first signal line switch circuit, the first semiconductor film electrically connected to the first drain line, the second drain line, the first source line, the first gate line, and the second gate line, in the first signal line switch circuit, the second semiconductor film electrically connected to the third drain line, the second source line, and the third gate line, in the second signal line switch circuit, the first semiconductor film electrically connected to the first drain line, the second drain line, the first source line, the first gate line, and the second gate line, and in the second signal line switch circuit, the second semiconductor film electrically connected to the third drain line, the second source line, and the third gate line.
This invention relates to a display device with improved signal line switching circuits. The technology addresses the challenge of efficiently routing and controlling electrical signals in display panels, particularly in configurations requiring multiple signal lines and gate lines. The display device includes a first signal line switch circuit and a second signal line switch circuit, each comprising two semiconductor films that are physically separated from each other. In the first signal line switch circuit, the first semiconductor film is electrically connected to a first drain line, a second drain line, a first source line, a first gate line, and a second gate line. The second semiconductor film in the same circuit is connected to a third drain line, a second source line, and a third gate line. The second signal line switch circuit mirrors this structure, with its first semiconductor film connected to the same drain lines, source line, and gate lines as the first circuit's first semiconductor film, while its second semiconductor film is connected to the same third drain line, second source line, and third gate line as the first circuit's second semiconductor film. This dual-semiconductor film design allows for more flexible and efficient signal routing, reducing complexity and improving performance in display devices.
7. The display device of claim 4 , wherein the second sub-pixel of the first pixel is a same color pixel as the second sub-pixel of the second pixel.
This invention relates to display devices, specifically addressing color consistency and alignment in pixel structures. The problem being solved involves ensuring accurate color reproduction and alignment between sub-pixels in adjacent pixels to improve display quality. The display device includes a plurality of pixels, each containing multiple sub-pixels of different colors. Each pixel has a first sub-pixel and a second sub-pixel, where the second sub-pixel of one pixel is the same color as the second sub-pixel of an adjacent pixel. This alignment ensures that corresponding sub-pixels in neighboring pixels share the same color, reducing misalignment and improving color uniformity across the display. The display device may also include a third sub-pixel in each pixel, where the third sub-pixel of one pixel is the same color as the third sub-pixel of an adjacent pixel. This further enhances color consistency. The sub-pixels may be arranged in a specific pattern, such as a stripe or delta arrangement, to optimize color blending and reduce visual artifacts. The invention ensures that corresponding sub-pixels in adjacent pixels maintain the same color, improving color accuracy and reducing misalignment issues in display devices. This is particularly useful in high-resolution displays where precise sub-pixel alignment is critical for image quality.
8. The display device of claim 7 , wherein a polarity of a signal fed to the second signal line is opposite to a polarity of a signal fed to the fifth signal line.
This invention relates to display devices, specifically addressing signal polarity management in display panels to improve image quality and reduce power consumption. The device includes a display panel with multiple signal lines, including a first signal line connected to a first pixel, a second signal line connected to a second pixel, and a fifth signal line connected to a third pixel. The second and fifth signal lines are configured to receive signals with opposite polarities. This polarity inversion helps mitigate visual artifacts such as flicker and ghosting, which occur due to inconsistent charge distribution across pixels. By ensuring opposite polarities in adjacent or related signal lines, the device achieves more uniform pixel charging, leading to better display performance. The invention also includes a driving circuit that generates these signals with controlled polarities, ensuring proper synchronization across the display panel. This approach is particularly useful in high-resolution or high-refresh-rate displays where signal integrity is critical. The invention improves upon prior art by providing a more efficient and reliable method of polarity control, reducing power consumption while maintaining or enhancing image quality.
9. The display device of claim 3 , wherein in the first signal line switch circuit, the first source line and the second source line are connected to the same wiring, respectively, and in the second signal line switch circuit, the first source line and the second source line are connected to the same wiring, respectively.
This invention relates to display devices, specifically addressing the challenge of efficiently routing signal lines in display panels to reduce complexity and improve manufacturing yield. The device includes a display panel with multiple signal line switch circuits that control the connection between source lines and data lines. The first and second signal line switch circuits each have a first source line and a second source line, where each source line in both circuits is connected to the same wiring. This configuration simplifies the wiring layout by reducing the number of distinct connections, minimizing potential signal interference and manufacturing defects. The switch circuits selectively connect the source lines to data lines based on control signals, enabling precise data transmission to display pixels. By ensuring consistent wiring connections across the switch circuits, the design enhances reliability and reduces the risk of misconnections. The invention is particularly useful in high-resolution displays where efficient signal routing is critical for performance and cost-effectiveness.
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January 7, 2020
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