Legal claims defining the scope of protection. Each claim is shown in both the original legal language and a plain English translation.
1. A method comprising: receiving an instruction to decompress a run-length-encoded (RLE) value; wherein the RLE value comprises a plurality of bits; wherein each bit, of the RLE value, corresponds to a corresponding run length of a plurality of run lengths; and in response to receiving the instruction to decompress the RLE value, performing a set of actions during both of a first pipelined execution stage and a second pipelined execution stage; wherein the first pipelined execution stage comprises: replicating each bit, of the RLE value, a number of times indicated by the corresponding run length that corresponds to the bit, to produce a respective decompressed sub-value of a plurality of decompressed sub-values that are based on the RLE value; and wherein at least one plurality of bits, from the RLE value, are replicated in parallel; concatenating the decompressed sub-values, of the plurality of decompressed sub-values, in parallel based on the order of the bits within the RLE value to which the decompressed sub-values correspond, to produce two or more decompressed intermediate values; wherein the second pipelined execution stage comprises concatenating the two or more decompressed intermediate values to produce a decompressed value; storing the decompressed value as a result for the instruction to decompress the RLE value; wherein the method is performed by one or more computing devices.
The invention relates to a method for decompressing run-length-encoded (RLE) values in a pipelined execution process. RLE is a data compression technique where sequences of identical data elements are stored as a single value and a count, reducing storage space. The method addresses the challenge of efficiently decompressing RLE values in hardware or software pipelines, particularly in systems requiring high-speed data processing. The method receives an RLE value composed of multiple bits, where each bit corresponds to a run length indicating how many times that bit should be replicated. Upon receiving a decompression instruction, the method performs actions across two pipelined execution stages. In the first stage, each bit of the RLE value is replicated according to its corresponding run length, producing decompressed sub-values. Multiple bits from the RLE value are replicated in parallel to enhance processing speed. These sub-values are then concatenated in parallel based on the original bit order, generating two or more decompressed intermediate values. In the second stage, these intermediate values are concatenated to produce the final decompressed value, which is stored as the result. The method is executed by one or more computing devices, leveraging parallel processing to improve efficiency. This approach optimizes decompression by distributing the workload across pipelined stages, reducing latency and improving throughput in systems handling compressed data.
2. The method of claim 1 , wherein all of the decompressed sub-values, of the plurality of decompressed sub-values, have the same number of bits, respectively; the method further comprises: shifting zero or more bits out of one or more decompressed sub-values, of the plurality of decompressed sub-values, to produce one or more adjusted intermediate sub-values; wherein a number of bits shifted out of each of the one or more adjusted intermediate sub-values is based, at least in part, on the corresponding run length that corresponds to the bit, of the RLE value, that is represented in the decompressed sub-value.
This invention relates to data decompression, specifically improving run-length encoded (RLE) decompression by standardizing sub-value bit lengths and adjusting intermediate values. The problem addressed is inefficient decompression when sub-values vary in bit length, leading to processing delays and complexity. The solution involves decompressing RLE-encoded data into sub-values, ensuring each sub-value has the same number of bits. After decompression, the method shifts zero or more bits from one or more sub-values to produce adjusted intermediate values. The number of bits shifted from each sub-value depends on the corresponding run length in the original RLE data. This ensures consistent bit-length handling, improving decompression efficiency and reducing computational overhead. The technique is particularly useful in systems requiring fast, predictable decompression, such as real-time data processing or embedded systems. By standardizing sub-value lengths and dynamically adjusting intermediate values, the method optimizes decompression performance while maintaining data integrity.
3. The method of claim 2 , wherein: each of the plurality of run lengths is represented as a biased value; the method further comprises: calculating a plurality of shift counts, one for each particular bit of the RLE value, based on the corresponding run length, of the plurality of run lengths, that corresponds to the particular bit, and wherein each shift count, of the plurality of shift counts, corresponds to the decompressed sub-value that also corresponds to the corresponding bit of the RLE value; and wherein each of the plurality of shift counts respectively represents a number of bits to be shifted out of the corresponding decompressed sub-value, of the plurality of decompressed sub-values.
This invention relates to data compression and decompression techniques, specifically improving the efficiency of run-length encoding (RLE) decompression. The problem addressed is the computational overhead and complexity in decompressing RLE-encoded data, particularly when handling variable-length runs of identical values. The method involves decompressing an RLE value into a sequence of decompressed sub-values, where each sub-value corresponds to a bit in the RLE value. Each run length in the encoded data is represented as a biased value, which allows for efficient storage and processing. For each bit in the RLE value, a shift count is calculated based on the corresponding run length. This shift count determines how many bits should be shifted out of the decompressed sub-value associated with that bit. The shift counts are derived from the run lengths, ensuring that the decompressed data accurately reconstructs the original sequence of values. By using biased run lengths and shift counts, the method optimizes the decompression process, reducing the number of operations required to reconstruct the original data. This approach is particularly useful in systems where fast decompression is critical, such as real-time data processing or embedded systems with limited computational resources. The technique ensures accurate decompression while minimizing computational overhead.
4. The method of claim 3 , wherein calculating a particular shift count, of the plurality of shift counts, comprises inverting the corresponding run length on which the particular shift count is based.
This invention relates to data compression techniques, specifically methods for optimizing shift operations in run-length encoding (RLE) to improve compression efficiency. The problem addressed is the computational overhead and inefficiency in traditional RLE methods when processing variable-length runs of data, particularly in scenarios where runs are not uniformly distributed. The method involves analyzing a sequence of data to identify runs of repeated symbols, where each run is characterized by a run length representing the number of consecutive identical symbols. For each run, a shift count is calculated to determine the optimal number of positions to shift the run within a data structure, such as a bit array or lookup table, to minimize storage requirements. The key innovation is that the shift count for a particular run is derived by inverting the corresponding run length. This inversion process transforms the run length into a value that, when applied as a shift, optimizes the placement of the run within the data structure, reducing redundancy and improving compression ratios. The method may also include adjusting the shift count based on additional factors, such as the distribution of run lengths or the constraints of the target storage medium. The overall approach enhances compression efficiency by dynamically adapting shift operations to the characteristics of the input data.
5. The method of claim 3 , wherein the biased values, of the plurality of run lengths, are each represented by three bits.
A system and method for encoding and decoding data using run-length encoding (RLE) with biased values represented by a fixed bit length. The technology addresses inefficiencies in traditional RLE methods, particularly in scenarios where run lengths vary widely, leading to suboptimal compression or increased computational overhead. The invention improves upon prior art by assigning biased values to run lengths, where each biased value is encoded using exactly three bits. This fixed-length representation simplifies decoding and reduces processing time while maintaining compression efficiency. The biased values are derived from a predefined mapping that converts raw run lengths into a more compact form, ensuring that frequently occurring run lengths are encoded with shorter bit sequences. The method includes steps for generating biased values from input data, encoding these values into three-bit representations, and subsequently decoding them back into original run lengths. The system may be applied in data compression, image processing, or any domain requiring efficient run-length encoding. The fixed three-bit encoding ensures compatibility with hardware implementations and reduces memory usage compared to variable-length encoding schemes. The invention optimizes both encoding and decoding processes by eliminating the need for complex bit manipulation, making it suitable for real-time applications.
6. The method of claim 3 , further comprising: respectively concatenating at least two adjusted intermediate sub-values with two or more decompressed sub-values, of the plurality of decompressed sub-values, to produce two or more composite replicated sub-values; calculating a respective composite shift count, for each of the two or more composite replicated sub-values, based on the shift count for the respective decompressed sub-value included in the composite replicated sub-value; shifting zero or more bits, from each of the two or more composite replicated sub-values, based on the shift count calculated for the respective composite replicated sub-value; wherein said calculating the composite shift count is performed in parallel with said shifting the zero or more bits out of the two or more composite replicated sub-values.
This invention relates to data processing techniques for handling decompressed sub-values in a parallel processing environment. The problem addressed involves efficiently combining and manipulating decompressed data segments while maintaining synchronization and accuracy in bit-level operations. The method involves concatenating at least two adjusted intermediate sub-values with two or more decompressed sub-values from a plurality of decompressed sub-values to produce two or more composite replicated sub-values. Each composite replicated sub-value is generated by combining a decompressed sub-value with an adjusted intermediate sub-value. For each composite replicated sub-value, a composite shift count is calculated based on the shift count associated with the decompressed sub-value included in that composite replicated sub-value. The method then shifts zero or more bits from each composite replicated sub-value according to its respective composite shift count. The calculation of the composite shift count and the bit-shifting operations are performed in parallel to enhance processing efficiency. This approach ensures that the data manipulation steps are synchronized and executed concurrently, optimizing performance in parallel processing systems.
7. The method of claim 6 , wherein concatenating the decompressed sub-values to produce the two or more decompressed intermediate values comprises: concatenating the two or more composite replicated sub-values together to produce the two or more decompressed intermediate values.
This invention relates to data compression and decompression techniques, specifically addressing the efficient reconstruction of decompressed data from compressed sub-values. The problem solved involves accurately reassembling decompressed data by properly concatenating intermediate sub-values derived from a compressed data stream. During decompression, data is often split into smaller sub-values for processing, and these sub-values must be correctly combined to reconstruct the original decompressed values. The invention ensures that composite replicated sub-values, which are sub-values that have been replicated or modified during compression, are properly concatenated to produce accurate decompressed intermediate values. This method prevents errors in data reconstruction by ensuring that the sub-values are combined in the correct order and format, maintaining data integrity throughout the decompression process. The technique is particularly useful in systems where data is compressed into smaller segments for storage or transmission and later decompressed for use, such as in file compression, network data transmission, or database storage systems. By accurately concatenating the composite replicated sub-values, the invention ensures that the decompressed data matches the original uncompressed data, improving reliability in data processing applications.
8. The method of claim 2 , wherein shifting zero or more bits out of one or more decompressed sub-values comprises shifting, in parallel, zero or more bits out of two or more decompressed sub-values of the plurality of decompressed sub-values.
This invention relates to data compression and decompression techniques, specifically focusing on efficient bit manipulation during the decompression process. The problem addressed is the computational overhead and inefficiency in handling decompressed data, particularly when extracting or shifting bits from multiple decompressed sub-values sequentially. Traditional methods often process sub-values one at a time, leading to slower performance and higher resource usage. The invention improves upon this by enabling parallel bit shifting across multiple decompressed sub-values. During decompression, data is divided into sub-values, which are then decompressed individually. Instead of processing these sub-values sequentially, the method allows for simultaneous bit shifting operations on two or more decompressed sub-values. This parallel processing reduces the time required to extract or manipulate bits, enhancing overall decompression speed and efficiency. The technique is particularly useful in systems where rapid data access and low-latency processing are critical, such as real-time data streaming or high-performance computing environments. By leveraging parallelism, the invention minimizes bottlenecks and optimizes resource utilization during decompression.
9. The method of claim 1 , wherein the set of actions is performed using hardware that is implemented in one of: a block that is external to one or more processors of the one or more computing devices; or one or more processors of the one or more computing devices.
This invention relates to hardware-implemented methods for performing a set of actions in computing systems. The problem addressed is the need for efficient and secure execution of actions, such as data processing or security operations, in computing environments. The invention provides a method where a set of actions is performed using specialized hardware. This hardware can be either a dedicated block external to the system's processors or integrated within the processors themselves. The hardware is designed to execute the actions with improved performance, security, or efficiency compared to traditional software-based approaches. The method ensures that the actions are carried out in a controlled and optimized manner, leveraging hardware capabilities to enhance reliability and reduce latency. The hardware may include specialized circuits, accelerators, or secure enclaves to handle sensitive or performance-critical tasks. This approach is particularly useful in systems requiring high-speed processing, secure data handling, or real-time operations, such as cryptographic operations, data encryption, or specialized computations. The invention aims to provide a flexible and scalable solution that can be adapted to different computing architectures while maintaining high performance and security standards.
10. The method of claim 1 , wherein, in the decompressed value, the bits of the decompressed sub-values, of the plurality of decompressed sub-values, are concatenated without any intervening unused bits between the bits of the decompressed sub-values.
This invention relates to data compression and decompression techniques, specifically addressing the efficient handling of decompressed sub-values. The problem being solved involves optimizing the storage and processing of decompressed data by eliminating unnecessary gaps or unused bits between concatenated sub-values. In conventional systems, decompressed data may contain intervening unused bits, which can lead to inefficiencies in storage and processing. The invention improves upon this by ensuring that when decompressed sub-values are concatenated, no unused bits are inserted between them. This results in a more compact and contiguous representation of the decompressed data, reducing overhead and improving performance. The method involves decompressing a plurality of sub-values and then concatenating their bits directly, without any intervening unused bits. This approach is particularly useful in applications where data integrity and processing efficiency are critical, such as in embedded systems, real-time processing, or high-speed data transmission. By eliminating unused bits, the invention ensures that the decompressed data is stored and processed in the most efficient manner possible, minimizing wasted space and computational overhead.
11. The method of claim 1 , further comprising: receiving an instruction to determine a length of the decompressed value; in response to receiving the instruction to determine the length of the decompressed value: calculating a plurality of shift counts, one for each particular bit of the RLE value, based on the corresponding run length, of the plurality of run lengths, that corresponds to the particular bit, adding together the plurality of shift counts to produce a total shift count value, and performing a 2's complement on the total shift count value to produce a determined length value; and returning, as a result for the instruction to determine the length of the decompressed value, the determined length value.
This invention relates to data compression and decompression, specifically improving the efficiency of run-length encoded (RLE) data processing. The problem addressed is the computational overhead in determining the length of decompressed data without fully decompressing it, which is inefficient for applications requiring only the length information. The method involves a system that processes RLE-encoded data, where the encoded data consists of run lengths representing sequences of identical bits. To determine the decompressed length without full decompression, the system receives an instruction to calculate this length. In response, it computes shift counts for each bit in the RLE value, where each shift count corresponds to the run length of the bit's sequence. These shift counts are summed to produce a total shift count, which is then converted to a 2's complement representation to yield the decompressed length. This result is returned as the output for the length determination instruction. The approach avoids full decompression by leveraging mathematical operations on the run lengths, reducing computational overhead. This is particularly useful in systems where only the decompressed data length is needed, such as memory allocation or buffer management. The method ensures accurate length calculation while minimizing processing time and resource usage.
12. The method of claim 11 , wherein: the instruction to decompress the RLE value is a first instruction to decompress a first RLE value; the decompressed value is a first decompressed value that is represented with a 64 bit-representation; the determined length value indicates a length of less than 64 bits; the 64 bit-representation includes one or more unused bits; and the method further comprises: receiving a second instruction to decompress a second RLE value; in response to receiving the second instruction, performing the set of actions, based on information for the second RLE value, to produce a second decompressed value; receiving one or more instructions to concatenate the first decompressed value and the second decompressed value based, at least in part, on the determined length value; and in response to receiving the one or more instructions to concatenate the first decompressed value and the second decompressed value based, at least in part, on the determined length value, generating a concatenated value that includes both the first decompressed value and the second decompressed value without intervening unused bits.
The invention relates to a method for efficiently decompressing and concatenating run-length encoded (RLE) values in a computing system. The method addresses the challenge of handling decompressed values that are smaller than their storage representation, which can lead to inefficiencies due to unused bits. The method decompresses a first RLE value into a 64-bit representation, where the decompressed value occupies fewer than 64 bits, leaving unused bits. A second RLE value is then decompressed into a second 64-bit representation. The method concatenates the two decompressed values, ensuring no unused bits remain between them. The concatenation is based on a determined length value that specifies the size of the first decompressed value. This approach optimizes memory usage and processing efficiency by eliminating wasted space between concatenated values. The method is particularly useful in systems where multiple RLE values must be combined into a single, contiguous data structure.
13. The method of claim 1 , wherein each of the first pipelined execution stage and the second pipelined execution stage has a throughput of one cycle.
A method for improving processing efficiency in a pipelined execution system addresses the challenge of optimizing throughput in multi-stage pipelines. The method involves executing instructions through at least two pipelined execution stages, where each stage processes one instruction per cycle, ensuring maximum utilization of the pipeline. The first pipelined execution stage performs initial processing steps, such as instruction decoding or operand fetching, while the second pipelined execution stage handles subsequent operations, such as arithmetic logic operations or memory access. By maintaining a throughput of one cycle per stage, the method ensures continuous instruction flow without stalls, enhancing overall system performance. The method may also include additional stages for further processing, with each stage similarly operating at a one-cycle throughput to sustain high efficiency. This approach minimizes idle cycles and maximizes instruction completion rates, particularly in systems where multiple instructions must be processed sequentially. The method is applicable in high-performance computing environments, such as processors or specialized accelerators, where minimizing latency and maximizing throughput are critical.
14. One or more non-transitory computer-readable media storing one or more sequences of instructions, which, when executed by one or more processors, cause: receiving an instruction to decompress a run-length-encoded (RLE) value; wherein the RLE value comprises a plurality of bits; wherein each bit, of the RLE value, corresponds to a corresponding run length of a plurality of run lengths; and in response to receiving the instruction to decompress the RLE value, performing a set of actions during both of a first pipelined execution stage and a second pipelined execution stage; wherein the first pipelined execution stage comprises: replicating each bit, of the RLE value, a number of times indicated by the corresponding run length that corresponds to the bit, to produce a respective decompressed sub-value of a plurality of decompressed sub-values that are based on the RLE value; and wherein at least one plurality of bits, from the RLE value, are replicated in parallel; concatenating the decompressed sub-values, of the plurality of decompressed sub-values, in parallel based on the order of the bits within the RLE value to which the decompressed sub-values correspond, to produce two or more decompressed intermediate values; wherein the second pipelined execution stage comprises concatenating the two or more decompressed intermediate values to produce a decompressed value; storing the decompressed value as a result for the instruction to decompress the RLE value.
The invention relates to a method for decompressing run-length-encoded (RLE) values using a pipelined execution process. RLE is a data compression technique where sequences of identical data elements are stored as a single value and a count, reducing storage space. The problem addressed is the efficient and parallelized decompression of RLE values to improve processing speed and resource utilization. The system receives an instruction to decompress an RLE value, which consists of multiple bits, each representing a run length. The decompression process is divided into two pipelined execution stages. In the first stage, each bit of the RLE value is replicated a number of times corresponding to its run length, producing decompressed sub-values. This replication is performed in parallel for at least one group of bits from the RLE value. The sub-values are then concatenated in parallel based on the original bit order, generating two or more decompressed intermediate values. In the second stage, these intermediate values are concatenated to produce the final decompressed value, which is stored as the result. The parallel replication and concatenation steps enhance decompression efficiency by leveraging pipelined processing, reducing latency and improving throughput. This approach is particularly useful in applications requiring fast decompression of compressed data streams.
15. The one or more non-transitory computer-readable media of claim 14 , wherein: all of the decompressed sub-values, of the plurality of decompressed sub-values, have the same number of bits, respectively; the one or more sequences of instructions further comprise instructions which, when executed by one or more processors, cause: shifting zero or more bits out of one or more decompressed sub-values, of the plurality of decompressed sub-values, to produce one or more adjusted intermediate sub-values; wherein a number of bits shifted out of each of the one or more adjusted intermediate sub-values is based, at least in part, on the corresponding run length that corresponds to the bit, of the RLE value, that is represented in the decompressed sub-value.
This invention relates to data compression and decompression, specifically improving run-length encoded (RLE) data processing. The problem addressed is inefficient handling of decompressed sub-values in RLE data, particularly when sub-values have varying bit lengths or require alignment adjustments. The invention involves a system for processing decompressed RLE data where all sub-values are of uniform bit length. The system includes instructions for shifting zero or more bits from one or more decompressed sub-values to produce adjusted intermediate sub-values. The number of bits shifted from each sub-value depends on the corresponding run length associated with the bit in the RLE value that the sub-value represents. This ensures proper alignment and efficient processing of the decompressed data. The system first decompresses RLE data into a plurality of sub-values, each representing a segment of the original data. Since all sub-values have the same bit length, the shifting operation can be uniformly applied. The shifting adjusts the sub-values based on their corresponding run lengths, ensuring that the decompressed data is correctly reconstructed. This approach optimizes memory usage and processing speed by standardizing sub-value lengths and dynamically adjusting them as needed. The invention is particularly useful in applications requiring fast and efficient RLE data decompression, such as image processing or data transmission systems.
16. The one or more non-transitory computer-readable media of claim 15 , wherein: each of the plurality of run lengths is represented as a biased value; the one or more sequences of instructions further comprise instructions which, when executed by one or more processors, cause: calculating a plurality of shift counts, one for each particular bit of the RLE value, based on the corresponding run length, of the plurality of run lengths, that corresponds to the particular bit, and wherein each shift count, of the plurality of shift counts, corresponds to the decompressed sub-value that also corresponds to the corresponding bit of the RLE value; and wherein each of the plurality of shift counts respectively represents a number of bits to be shifted out of the corresponding decompressed sub-value, of the plurality of decompressed sub-values.
This invention relates to data compression and decompression techniques, specifically improving the efficiency of run-length encoding (RLE) decompression. The problem addressed is the computational overhead in decompressing RLE-encoded data, particularly when handling biased run lengths and generating decompressed sub-values. The invention describes a method for decompressing RLE-encoded data where each run length is represented as a biased value. During decompression, a plurality of shift counts is calculated, one for each bit of the RLE value. Each shift count corresponds to a decompressed sub-value and is derived from the run length associated with that bit. The shift count determines the number of bits to be shifted out of the corresponding decompressed sub-value, enabling efficient reconstruction of the original data. The technique optimizes decompression by leveraging biased run lengths to minimize computational steps, reducing the time and resources required to process compressed data. This approach is particularly useful in systems where fast decompression is critical, such as real-time data processing or embedded systems with limited computational power. The method ensures accurate reconstruction of decompressed data while improving performance.
17. The one or more non-transitory computer-readable media of claim 16 , wherein calculating a particular shift count, of the plurality of shift counts, comprises inverting the corresponding run length on which the particular shift count is based.
This invention relates to data compression techniques, specifically methods for optimizing shift operations in run-length encoding (RLE) to improve compression efficiency. The problem addressed is the computational overhead and inefficiency in traditional RLE methods when processing long sequences of repeated data, particularly in scenarios where shift operations are used to encode run lengths. The invention describes a system that calculates a plurality of shift counts for encoding run lengths in a data stream. Each shift count corresponds to a run length, which represents a sequence of repeated data elements. The key innovation involves inverting the run length to derive the shift count, which reduces the number of bits required to represent the run length in the compressed output. This inversion process ensures that shorter run lengths are encoded with fewer bits, while longer run lengths are encoded more efficiently by leveraging the inverted values. The system further includes a lookup table or a mathematical function to map run lengths to their corresponding inverted shift counts, allowing for rapid encoding and decoding. The method ensures that the shift counts are calculated dynamically based on the input data, optimizing compression without requiring pre-defined thresholds or fixed bit allocations. This approach is particularly useful in applications where memory and processing efficiency are critical, such as embedded systems, real-time data processing, and high-performance computing environments. The invention improves upon prior art by minimizing the overhead associated with shift operations while maintaining or enhancing compression ratios.
18. The one or more non-transitory computer-readable media of claim 15 , wherein shifting zero or more bits out of one or more decompressed sub-values comprises shifting, in parallel, zero or more bits out of two or more decompressed sub-values of the plurality of decompressed sub-values.
The invention relates to data compression and decompression techniques, specifically improving the efficiency of bit manipulation during decompression. The problem addressed is the computational overhead and latency associated with sequentially processing decompressed data, particularly when extracting or shifting bits from multiple decompressed sub-values. Traditional methods often handle these operations serially, leading to inefficiencies in high-performance computing environments where parallel processing is critical. The invention provides a method for decompressing data that includes generating a plurality of decompressed sub-values from a compressed data stream. During decompression, the system shifts zero or more bits out of one or more of these sub-values. A key improvement is the ability to perform these bit shifts in parallel across two or more decompressed sub-values simultaneously. This parallel processing reduces the time required to manipulate decompressed data, enhancing overall system performance. The technique is particularly useful in applications requiring real-time data processing, such as multimedia streaming, where minimizing latency is essential. The invention may also include additional steps such as combining the decompressed sub-values into a final decompressed output, ensuring the integrity and accuracy of the reconstructed data. By leveraging parallel bit shifting, the system achieves faster decompression without sacrificing data fidelity.
19. The one or more non-transitory computer-readable media of claim 14 , wherein the set of actions is performed using hardware that is implemented in one of: one or more processors of the one or more computing devices; or a block that is external to one or more processors of the one or more computing devices.
The invention relates to a system for performing a set of actions in a computing environment. The problem addressed is the need for flexibility in how actions are executed, particularly in systems where hardware resources may vary or where certain operations must be handled outside of a processor's core execution path. The system involves a set of non-transitory computer-readable media storing instructions that, when executed, cause one or more computing devices to perform a set of actions. The key innovation is the ability to execute these actions using either internal processor hardware or external hardware blocks. Internal execution involves using one or more processors within the computing devices, while external execution leverages hardware blocks that are separate from the processors. This dual-mode approach allows for optimization based on performance, power efficiency, or other constraints. The external hardware blocks may include specialized accelerators, co-processors, or other dedicated circuits designed to handle specific tasks more efficiently than general-purpose processors. The system ensures compatibility and seamless integration between internal and external execution paths, enabling dynamic allocation of tasks based on system capabilities and workload demands. This flexibility improves overall system efficiency and adaptability in diverse computing environments.
20. The one or more non-transitory computer-readable media of claim 14 , wherein the one or more sequences of instructions further comprise instructions which, when executed by one or more processors, cause: receiving an instruction to determine a length of the decompressed value; in response to receiving the instruction to determine the length of the decompressed value: calculating a plurality of shift counts, one for each particular bit of the RLE value, based on the corresponding run length, of the plurality of run lengths, that corresponds to the particular bit, adding together the plurality of shift counts to produce a total shift count value, and performing a 2's complement on the total shift count value to produce a determined length value; and returning, as a result for the instruction to determine the length of the decompressed value, the determined length value.
This invention relates to data compression and decompression, specifically improving the efficiency of run-length encoded (RLE) data processing. The problem addressed is the computational overhead in determining the length of decompressed data from RLE values, which often requires iterative or complex calculations. The invention provides a method for efficiently calculating the length of decompressed data from RLE values. The process involves receiving an instruction to determine the length of a decompressed value. In response, the system calculates a plurality of shift counts, one for each bit of the RLE value, based on the corresponding run length. Each shift count is derived from the run length associated with the particular bit. These shift counts are then summed to produce a total shift count value. A 2's complement operation is performed on this total shift count value to generate the determined length value, which is returned as the result. This approach optimizes the length calculation by leveraging bit-level operations and arithmetic shifts, reducing the need for iterative processing. The method is particularly useful in systems where RLE decompression performance is critical, such as real-time data processing or embedded systems with limited computational resources. The invention ensures accurate length determination while minimizing computational overhead.
21. The one or more non-transitory computer-readable media of claim 20 , wherein: the instruction to decompress the RLE value is a first instruction to decompress a first RLE value; the decompressed value is a first decompressed value that is represented with a 64 bit-representation; the determined length value indicates a length of less than 64 bits; the 64 bit-representation includes one or more unused bits; and the one or more sequences of instructions further comprise instructions which, when executed by one or more processors, cause: receiving a second instruction to decompress a second RLE value; in response to receiving the second instruction, performing the set of actions, based on information for the second RLE value, to produce a second decompressed value; receiving one or more instructions to concatenate the first decompressed value and the second decompressed value based, at least in part, on the determined length value; and in response to receiving the one or more instructions to concatenate the first decompressed value and the second decompressed value based, at least in part, on the determined length value, generating a concatenated value that includes both the first decompressed value and the second decompressed value without intervening unused bits.
This invention relates to data compression and decompression, specifically handling run-length encoded (RLE) values in a computing system. The problem addressed involves efficiently decompressing RLE values and concatenating them to form a final output without unnecessary padding or unused bits. The system decompresses a first RLE value into a 64-bit representation, where the decompressed value may occupy fewer than 64 bits, leaving unused bits. A length value indicates the actual bit length of the decompressed data. The system then decompresses a second RLE value into another decompressed value. These two decompressed values are concatenated based on their respective length values, ensuring no unused bits remain between them. This approach optimizes storage and processing by avoiding bit padding, which is particularly useful in systems where bit-level precision is critical, such as in data transmission or memory management. The method ensures efficient concatenation of multiple decompressed values while maintaining data integrity and minimizing overhead.
22. The one or more non-transitory computer-readable media of claim 14 , wherein each of the first pipelined execution stage and the second pipelined execution stage has a throughput of one cycle.
The invention relates to a pipelined execution system for processing data in a computing environment. The system addresses the challenge of improving processing efficiency by reducing latency and increasing throughput in data processing pipelines. The invention involves a pipelined execution system with at least two execution stages, where each stage processes data in a sequential manner. The first pipelined execution stage receives input data and performs an initial set of operations, while the second pipelined execution stage receives the output from the first stage and performs subsequent operations. The system is designed such that each execution stage has a throughput of one cycle, meaning each stage can process one data item per clock cycle. This high-throughput design ensures that the pipeline operates efficiently without bottlenecks, allowing for continuous and rapid data processing. The system may include additional components such as input buffers, output buffers, or control logic to manage data flow between stages and ensure synchronization. The invention aims to optimize performance in applications requiring high-speed data processing, such as real-time analytics, signal processing, or machine learning.
23. A computing device comprising: one or more processors; one or more first hardware components configured to perform a first set of actions comprising a first pipelined execution stage for decompressing run-length encoded (RLE) values; one or more second hardware components configured to perform a second set of actions comprising a second pipelined execution stage for decompressing RLE values; and one or more computer-readable media configured to store decompressed values based on RLE values; wherein the first set of actions comprises: replicating each bit, of an RLE value that comprises a plurality of bits, a number of times indicated by a corresponding run length that corresponds to the bit, to produce a respective decompressed sub-value of a plurality of decompressed sub-values that are based on the RLE value, and wherein at least one plurality of bits, from the RLE value, are replicated in parallel; concatenating the decompressed sub-values, of the plurality of decompressed sub-values, in parallel based on the order of the bits within the RLE value to which the decompressed sub-values correspond, to produce two or more decompressed intermediate values; wherein the second set of actions comprises: concatenating the two or more decompressed intermediate values to produce a decompressed value; and storing the decompressed value in the one or more computer-readable media.
This invention relates to hardware-accelerated run-length encoding (RLE) decompression in computing devices. The problem addressed is the inefficient processing of RLE decompression in software, which can be slow and consume excessive computational resources. The solution involves a specialized hardware architecture that decompresses RLE values using parallel pipelined execution stages to improve performance. The computing device includes dedicated hardware components for decompressing RLE values. The first hardware components perform a first pipelined execution stage where each bit of an RLE value is replicated a number of times indicated by a corresponding run length. This replication occurs in parallel for at least one subset of bits from the RLE value, producing decompressed sub-values. These sub-values are then concatenated in parallel based on the original bit order within the RLE value to generate two or more decompressed intermediate values. The second hardware components perform a second pipelined execution stage, where the intermediate values are concatenated to produce a final decompressed value. This value is stored in computer-readable media. The parallel processing and pipelined stages enhance decompression speed and efficiency, making it suitable for applications requiring fast data decompression, such as multimedia processing or real-time data analysis.
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January 14, 2020
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