Legal claims defining the scope of protection. Each claim is shown in both the original legal language and a plain English translation.
1. A display panel comprising: a base substrate; a gate electrode disposed on a surface of the base substrate; a semiconductor layer disposed on the gate electrode; a source electrode and a drain electrode disposed on the semiconductor layer; a first insulating layer disposed on both the source electrode and the drain electrode; and a data line disposed on the first insulating layer, wherein the data line is electrically connected to the source electrode, via a contact hole penetrating through the first insulating layer, wherein the contact hole overlaps the gate electrode in a direction perpendicular to the surface of the base substrate, and wherein an upper surface of the first insulating layer is substantially planar.
This invention relates to a display panel structure, specifically addressing challenges in electrical connectivity and planarization in thin-film transistor (TFT) arrays. The display panel includes a base substrate with a gate electrode formed on its surface. A semiconductor layer is positioned above the gate electrode, followed by a source electrode and a drain electrode on the semiconductor layer. A first insulating layer covers both the source and drain electrodes. A data line is formed on the first insulating layer and electrically connects to the source electrode through a contact hole that penetrates the insulating layer. The contact hole is aligned directly above the gate electrode when viewed perpendicular to the substrate surface, ensuring precise electrical routing. The upper surface of the first insulating layer is planarized to minimize surface irregularities, which improves subsequent layer deposition and device performance. This design optimizes signal transmission while maintaining structural integrity in display manufacturing.
2. The display panel of claim 1 , wherein a dielectric constant of the first insulating layer is lower than a dielectric constant of the data line.
A display panel includes a substrate, a thin-film transistor (TFT) layer, a first insulating layer, a data line, and a pixel electrode. The TFT layer is formed on the substrate and includes a gate electrode, a semiconductor layer, a source electrode, and a drain electrode. The first insulating layer is formed over the TFT layer and has a lower dielectric constant than the data line. The data line is formed on the first insulating layer and is electrically connected to the source or drain electrode of the TFT. The pixel electrode is formed on the first insulating layer and is electrically connected to the drain or source electrode of the TFT. The first insulating layer electrically insulates the data line from the pixel electrode and other conductive layers. The lower dielectric constant of the first insulating layer reduces parasitic capacitance between the data line and the pixel electrode, improving signal integrity and reducing power consumption in the display panel. The display panel may be used in liquid crystal displays (LCDs), organic light-emitting diode (OLED) displays, or other flat-panel display technologies. The TFT layer may include amorphous silicon, low-temperature polycrystalline silicon, or oxide semiconductor materials. The first insulating layer may be made of materials such as silicon nitride, silicon oxide, or organic insulating materials with low dielectric constants.
3. The display panel of claim 1 , further comprising: a gate insulating layer disposed between the gate electrode and the semiconductor layer.
A display panel includes a substrate, a gate electrode, a semiconductor layer, and a gate insulating layer. The gate electrode is positioned on the substrate, and the semiconductor layer is arranged over the gate electrode. The gate insulating layer is disposed between the gate electrode and the semiconductor layer, electrically insulating the two components while allowing capacitive coupling. This configuration is part of a thin-film transistor (TFT) structure, commonly used in flat-panel displays such as LCDs, OLEDs, or AMOLEDs. The gate insulating layer ensures proper electrical isolation, preventing short circuits while enabling the gate electrode to control the conductivity of the semiconductor layer. The semiconductor layer may be an oxide semiconductor, amorphous silicon, or other suitable material, depending on the display technology. The gate insulating layer is typically made of silicon oxide, silicon nitride, or a combination thereof, chosen for its insulating properties and compatibility with the manufacturing process. This structure is essential for stable and efficient transistor operation, enabling precise control of pixel switching and display performance. The insulating layer also protects the semiconductor layer from contamination or damage during fabrication. This design is widely used in modern display technologies to achieve high-resolution, energy-efficient, and reliable visual output.
4. The display panel of claim 3 , further comprising: a gate line disposed on a same layer as the gate electrode, wherein the gate line and the gate electrode include a same material, and wherein the gate line intersects the data line.
A display panel includes a substrate with a thin-film transistor (TFT) array. The TFT array comprises a gate electrode, a semiconductor layer, a source electrode, and a drain electrode. The gate electrode is connected to a gate line, which is formed on the same layer as the gate electrode and consists of the same material. A data line intersects the gate line and is electrically insulated from it. The semiconductor layer is positioned between the gate electrode and the source/drain electrodes, forming a conductive channel when a voltage is applied to the gate electrode. The display panel is designed to address issues in TFT-based displays, such as signal interference and manufacturing complexity, by integrating the gate line and gate electrode in a single layer, reducing fabrication steps and improving electrical isolation between the gate and data lines. This configuration enhances display performance by minimizing signal crosstalk and ensuring reliable signal transmission. The invention is particularly relevant to active-matrix organic light-emitting diode (AMOLED) and liquid crystal display (LCD) technologies, where precise control of TFT switching is critical for image quality.
5. The display panel of claim 1 , wherein a thickness of a cross section of the source electrode is smaller than a smallest thickness of a cross section of the data line, and a thickness of a cross section of the drain electrode is smaller than the smallest thickness of the cross section of the data line.
This invention relates to display panels, specifically addressing the structural design of electrodes and data lines to improve performance and manufacturing efficiency. The display panel includes a substrate, a thin-film transistor (TFT) layer, and a light-emitting layer. The TFT layer contains a source electrode, a drain electrode, and a data line, all formed on the substrate. The source and drain electrodes are connected to the TFT, while the data line supplies electrical signals to the TFT. The key innovation lies in the thickness relationships of these components: the cross-sectional thickness of the source electrode is smaller than the smallest cross-sectional thickness of the data line, and similarly, the cross-sectional thickness of the drain electrode is also smaller than the smallest cross-sectional thickness of the data line. This design ensures optimal electrical conductivity and signal transmission while reducing material usage and manufacturing complexity. The light-emitting layer, positioned above the TFT layer, emits light based on the signals received from the TFT, enabling the display panel to function as part of an electronic device. The invention aims to enhance display efficiency, reliability, and cost-effectiveness by optimizing the electrode and data line configurations.
6. The display panel of claim 5 , wherein the thickness of the cross section of the source electrode is less than or equal to half the smallest thickness of the cross section of the data line, and the thickness of the cross section of the drain electrode is less than or equal to half the smallest thickness of the cross section of the data line.
This invention relates to display panel technology, specifically addressing the structural design of electrodes in thin-film transistor (TFT) arrays to improve performance and manufacturing efficiency. The problem being solved involves optimizing the thickness of source and drain electrodes relative to data lines to enhance electrical conductivity, reduce material usage, and prevent defects during fabrication. The display panel includes a substrate with a TFT array, where each TFT has a source electrode, a drain electrode, and a data line connected to the source electrode. The key innovation is that the thickness of the cross section of the source electrode is less than or equal to half the smallest thickness of the cross section of the data line. Similarly, the thickness of the cross section of the drain electrode is also less than or equal to half the smallest thickness of the cross section of the data line. This design ensures that the electrodes are sufficiently thin to minimize parasitic capacitance while maintaining reliable electrical connections. The reduced thickness of the electrodes compared to the data lines helps in reducing signal delay and power consumption, which is critical for high-resolution displays. Additionally, this configuration simplifies the manufacturing process by allowing for more precise patterning and reducing the risk of short circuits or other defects. The overall structure improves display uniformity and performance while lowering production costs.
7. The display panel of claim 1 , wherein the source electrode and the drain electrode are each made of a material that is different from a material of the data line.
A display panel includes a substrate, a thin-film transistor (TFT) layer, and a display layer. The TFT layer contains a gate electrode, a gate insulating layer, a semiconductor layer, a source electrode, a drain electrode, and a passivation layer. The display layer includes a color filter layer, a common electrode, and a pixel electrode. The source and drain electrodes are electrically connected to the semiconductor layer and are positioned on the same layer as the data line. The source and drain electrodes are made of a material different from the material of the data line. This design improves electrical conductivity and reduces resistance in the TFT structure, enhancing display performance. The different materials for the source/drain electrodes and the data line optimize manufacturing processes and device reliability. The display panel may be used in liquid crystal displays (LCDs), organic light-emitting diode (OLED) displays, or other flat-panel display technologies. The invention addresses challenges in achieving high conductivity and durability in TFT-based displays while maintaining cost-effective fabrication.
8. The display panel of claim 7 , wherein the source electrode and the drain electrode are made of one or more of titanium (Ti) or molybdenum (Mo).
This invention relates to display panels, specifically addressing the need for improved electrode materials to enhance performance and reliability. The display panel includes a substrate, a thin-film transistor (TFT) layer, and a display layer. The TFT layer contains a gate electrode, a gate insulating layer, an active layer, a source electrode, and a drain electrode. The source and drain electrodes are formed using one or more of titanium (Ti) or molybdenum (Mo), which provide high conductivity, excellent adhesion to underlying layers, and resistance to oxidation. These materials ensure stable electrical performance and long-term durability in the display panel. The active layer, positioned between the gate insulating layer and the source/drain electrodes, forms a channel for current flow when the TFT is activated. The gate electrode, located beneath the gate insulating layer, controls the TFT's switching behavior. The display layer, positioned above the TFT layer, includes elements like organic light-emitting diodes (OLEDs) or liquid crystal cells to produce visual output. The use of Ti or Mo for the source and drain electrodes improves conductivity and reduces resistance, leading to more efficient and reliable display operation. This design is particularly useful in high-resolution and flexible display applications where material stability and performance are critical.
9. The display panel of claim 7 , wherein the data line is a multi-layer structure including a first conductive layer and a second conductive layer, and wherein a material of the first conductive layer is different from a material of the second conductive layer.
A display panel includes a substrate, a plurality of pixels arranged in a matrix, and a plurality of data lines electrically connected to the pixels. The data lines are configured to transmit data signals to the pixels for display. The data lines have a multi-layer structure comprising a first conductive layer and a second conductive layer, where the material of the first conductive layer differs from the material of the second conductive layer. This multi-layer design improves conductivity and reduces resistance in the data lines, enhancing signal transmission efficiency and display performance. The different materials may be selected based on their electrical properties, such as conductivity, resistivity, or compatibility with other panel components. The display panel may be part of an organic light-emitting diode (OLED) display, a liquid crystal display (LCD), or another type of display technology. The multi-layer data lines help mitigate signal delay and voltage drop, particularly in large-area displays where long data lines are required. The different materials may also improve manufacturing yield and reliability by reducing defects or interlayer adhesion issues. The display panel may further include thin-film transistors (TFTs) connected to the data lines for controlling pixel activation. The multi-layer data lines can be integrated into the TFT structure or formed separately, depending on the display architecture. This design addresses challenges in high-resolution and large-format displays where signal integrity and power efficiency are critical.
10. The display panel of claim 9 , wherein the first conductive layer includes copper (Cu), and the second conductive layer includes indium zinc oxide (IZO).
A display panel is provided that addresses challenges in achieving high conductivity and transparency in display devices. The panel includes a first conductive layer made of copper (Cu) and a second conductive layer made of indium zinc oxide (IZO). Copper is used for its excellent electrical conductivity, which reduces resistance and improves signal transmission, while IZO is chosen for its high transparency and compatibility with display applications. The combination of these materials enhances both electrical performance and optical clarity, making the panel suitable for advanced display technologies such as OLED or LCD screens. The first conductive layer, typically positioned closer to the substrate, ensures efficient current distribution, while the second conductive layer, positioned above, maintains transparency for optimal light emission or transmission. This design balances conductivity and transparency, addressing limitations in conventional display panels that rely on less efficient conductive materials. The panel may also include additional layers, such as insulating or barrier layers, to protect the conductive layers and improve durability. The use of copper and IZO in this configuration enables high-performance displays with improved energy efficiency and image quality.
11. The display panel of claim 1 , further comprising: at least one reinforcing layer disposed on at least one surface of the base substrate.
A display panel includes a base substrate and a reinforcing layer applied to at least one surface of the base substrate. The reinforcing layer enhances the structural integrity and durability of the display panel, preventing deformation, cracking, or damage under mechanical stress. The base substrate serves as the foundational layer for the display panel, providing support for additional components such as thin-film transistors, color filters, or light-emitting elements. The reinforcing layer may be made from materials like metal, polymer, or composite materials, depending on the required strength and flexibility. This reinforcement is particularly useful in flexible or foldable displays, where the panel must withstand repeated bending without degradation. The reinforcing layer can be applied to one or both surfaces of the base substrate, depending on the specific structural requirements. The combination of the base substrate and reinforcing layer ensures the display panel maintains its performance and reliability under various environmental and usage conditions.
12. The display panel of claim 11 , wherein the reinforcing layer is formed as a thin film including silicon nitride (SiN x ).
A display panel includes a reinforcing layer integrated into its structure to enhance mechanical strength and durability. The reinforcing layer is formed as a thin film composed of silicon nitride (SiNx), which provides rigidity and resistance to bending or deformation. This thin film is applied to the display panel to prevent damage from external forces, such as impacts or pressure, while maintaining flexibility where needed. The silicon nitride material is chosen for its high strength-to-weight ratio and compatibility with display manufacturing processes. The reinforcing layer can be deposited using techniques like chemical vapor deposition (CVD) or physical vapor deposition (PVD), ensuring uniform coverage and adhesion to the underlying display layers. The display panel may include additional components such as a substrate, light-emitting elements, and encapsulation layers, all of which benefit from the added structural support provided by the silicon nitride reinforcing layer. This design is particularly useful in flexible or foldable displays, where maintaining structural integrity under repeated bending cycles is critical. The thin-film nature of the reinforcing layer ensures minimal impact on the overall thickness and flexibility of the display panel.
13. A display panel comprising: a first display substrate; a second display substrate that is smaller than the first display substrate; and a liquid crystal layer disposed between the first display substrate and the second display substrate, wherein a pixel electrode and a thin-film transistor are disposed on a surface of the first display substrate, wherein the thin-film transistor includes: a source electrode, a drain electrode, a gate electrode, and a semiconductor layer overlapping the gate electrode, wherein an insulating layer is disposed on both the source electrode and the drain electrode, wherein a data line is disposed on the insulating layer and is directly connected to a portion of the source electrode, wherein a thickness of the source electrode is less than a thickness of the data line, wherein an upper surface of the insulating layer is substantially planar, and wherein the portion of the source electrode overlaps the gate electrode in a direction perpendicular to the surface of the first display substrate.
This invention relates to a display panel with an improved thin-film transistor (TFT) structure for liquid crystal displays (LCDs). The display panel includes a first display substrate and a second, smaller display substrate, with a liquid crystal layer sandwiched between them. The first substrate contains pixel electrodes and TFTs, each TFT comprising a source electrode, drain electrode, gate electrode, and a semiconductor layer overlapping the gate electrode. An insulating layer covers both the source and drain electrodes, and a data line is placed on this insulating layer, directly connecting to a portion of the source electrode. The source electrode is thinner than the data line, and the insulating layer's upper surface is substantially planar. The overlapping portion of the source electrode and gate electrode aligns perpendicularly to the substrate surface. This design ensures efficient electrical connections while maintaining a flat surface for the liquid crystal layer, improving display performance and manufacturing yield. The TFT structure optimizes conductivity and reduces defects by ensuring proper alignment and thickness control of the source electrode and data line.
14. The display panel of claim 13 , wherein a connection electrode is connected to the drain electrode and the thickness of the drain electrode is less than half a smallest thickness of the connection electrode.
This invention relates to display panel technology, specifically addressing the challenge of optimizing electrical connections in thin-film transistor (TFT) structures to improve performance and reliability. The display panel includes a TFT with a drain electrode and a connection electrode. The connection electrode is electrically coupled to the drain electrode, forming a conductive path. A key feature is that the drain electrode has a thickness that is less than half the smallest thickness of the connection electrode. This design ensures efficient current flow while minimizing material usage and potential signal loss. The reduced thickness of the drain electrode helps in achieving finer patterning and higher resolution in the display, while the thicker connection electrode maintains robust connectivity. This configuration is particularly useful in high-resolution displays where precise electrical connections are critical. The invention improves manufacturing efficiency and display performance by balancing electrical conductivity and structural integrity.
15. The display panel of claim 14 : wherein the data line is electrically connected to the source electrode via a first contact hole penetrating through the insulating layer, and the connection electrode is electrically connected to the drain electrode via a second contact hole penetrating through the insulating layer, and wherein the first contact hole and the second contact hole overlap the gate electrode in the direction perpendicular to the surface of the first display substrate.
This invention relates to display panel technology, specifically addressing the structural and electrical connections in thin-film transistor (TFT) arrays used in displays. The problem being solved involves optimizing the layout and electrical connections of TFT components to improve performance, reduce space, and enhance manufacturing efficiency. The display panel includes a first display substrate with a gate electrode, a source electrode, and a drain electrode forming a TFT. An insulating layer covers these components, and a data line is electrically connected to the source electrode through a first contact hole that penetrates the insulating layer. Additionally, a connection electrode is electrically connected to the drain electrode via a second contact hole that also penetrates the insulating layer. Both contact holes are positioned to overlap the gate electrode when viewed perpendicular to the substrate surface. This overlapping arrangement allows for a more compact design by utilizing the space above the gate electrode, reducing the overall footprint of the TFT structure. The overlapping contact holes also simplify the manufacturing process by aligning critical connections in a single region, improving electrical conductivity and reliability. This design is particularly useful in high-resolution displays where space efficiency and precise electrical connections are critical.
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April 14, 2020
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