Legal claims defining the scope of protection. Each claim is shown in both the original legal language and a plain English translation.
1. A computer device coupled to a peripheral device, comprising: a microprocessor; a voltage converter circuit, coupled to the microprocessor and configured to convert a first voltage of a system power of the computer device into a second voltage; a control circuit, coupled to the microprocessor and the voltage converter circuit and configured to control supply of the second voltage; and a detection circuit, coupled to the microprocessor and a power detection pin and configured to detect whether a power abnormality at the peripheral device has occurred, wherein the power detection pin is coupled to the peripheral device, and wherein when confirming that the system power is being supplied normally, the microprocessor is configured to generate a first enable signal to enable the voltage converter circuit, and when confirming that the voltage converter circuit functions normally, the microprocessor is configured to generate a second enable signal to enable the detection circuit, and the detection circuit is configured to generate a first detection signal based on a corresponding detection result, and wherein the microprocessor is further configured to determine whether to supply the second voltage to the peripheral device according to the first detection signal, when the first detection signal indicates that a power abnormality has not occurred at the peripheral device, the microprocessor generates a third enable signal to enable the control circuit, such that the second voltage is supplied to the peripheral device via the control circuit, wherein the voltage converter circuit is further configured to detect whether the second voltage is supplied normally and generate a third detection signal based on a corresponding detection result, and the voltage converter circuit is further configured to detect whether an output current thereof is overloaded and generate a fourth detection signal based on a corresponding detection result, and wherein the microprocessor is further configured to generate the second enable signal according to the third detection signal and the fourth detection signal.
This invention relates to a computer device with enhanced power management for peripheral devices. The system addresses the problem of ensuring stable and safe power delivery to peripheral devices while detecting and responding to power abnormalities. The computer device includes a microprocessor, a voltage converter circuit, a control circuit, and a detection circuit. The voltage converter circuit converts the system power from a first voltage to a second voltage suitable for the peripheral device. The control circuit regulates the supply of this converted voltage to the peripheral device. The detection circuit monitors the peripheral device for power abnormalities via a dedicated power detection pin. The microprocessor oversees the process, generating enable signals to activate the voltage converter and detection circuits only after confirming normal system power and proper voltage conversion. The detection circuit provides feedback on peripheral device power status, allowing the microprocessor to enable or disable voltage supply accordingly. Additionally, the voltage converter circuit monitors its own output voltage and current, generating detection signals to inform the microprocessor of any voltage supply issues or overload conditions. This ensures that power is only supplied to the peripheral device when all conditions are safe, preventing damage from power abnormalities or overloading.
2. The computer device as claimed in claim 1 , wherein when confirming that the system power is being supplied normally, the microprocessor is configured to wait for a predetermined period of time and then generate the first enable signal when the predetermined period of time expires.
This invention relates to a computer device with a microprocessor that manages system power supply. The problem addressed is ensuring reliable power supply before enabling critical operations, preventing system instability or damage due to power fluctuations. The computer device includes a microprocessor that monitors system power and generates control signals based on power status. When the microprocessor confirms that system power is being supplied normally, it waits for a predetermined period of time before generating a first enable signal. This delay ensures power stability before enabling subsequent operations. The predetermined period can be set based on system requirements, allowing flexibility in power stabilization time. The microprocessor may also be configured to perform other power-related functions, such as monitoring power supply status, detecting power fluctuations, or generating additional control signals to manage system components. The invention improves system reliability by ensuring power stability before enabling critical operations, reducing the risk of hardware damage or data corruption due to unstable power conditions.
3. The computer device as claimed in claim 1 , further comprising: a controller chip, coupled to the microprocessor, configured to detect whether the system power is being supplied to the computer device normally and to generate a second detection signal based on a corresponding detection result, wherein the microprocessor is configured to generate the first enable signal according to the second detection signal.
This invention relates to a computer device with enhanced power management, specifically addressing the need for reliable power supply detection to ensure stable operation. The device includes a microprocessor and a controller chip coupled to the microprocessor. The controller chip monitors the system power supply to determine if power is being delivered normally. If an abnormality is detected, the controller chip generates a second detection signal indicating the power status. The microprocessor uses this signal to generate a first enable signal, which controls the activation or deactivation of certain functions or components within the device. This ensures that the computer device operates only when power conditions are stable, preventing potential damage or data corruption due to power fluctuations. The system improves reliability by integrating real-time power monitoring and conditional activation of components based on power stability. The controller chip and microprocessor work together to dynamically adjust device behavior in response to power supply conditions, enhancing overall system robustness.
4. The computer device as claimed in claim 1 , wherein the detection circuit comprises: a diode, coupled between the power detection pin and a detection node; a first resistor, coupled between a voltage input terminal and the detection node; and a second resistor, coupled between the detection node and a ground node, wherein a level of voltage at the detection node varies with a level of voltage at the power detection pin.
This invention relates to a computer device with a power detection circuit designed to monitor voltage levels at a power detection pin. The circuit includes a diode connected between the power detection pin and a detection node, a first resistor between a voltage input terminal and the detection node, and a second resistor between the detection node and ground. The voltage level at the detection node changes in response to variations in the voltage at the power detection pin, allowing the circuit to detect power status or transitions. The diode ensures unidirectional current flow, while the resistors form a voltage divider network that scales the input voltage for detection. This configuration enables reliable power monitoring in electronic devices, particularly for detecting power-on, power-off, or voltage fluctuations. The circuit is compact, low-cost, and integrates seamlessly into computer systems requiring power state awareness. The detection node's voltage output can be used by a processor or control logic to trigger actions like system initialization, shutdown, or error handling based on the detected power conditions. The design avoids complex components, relying instead on passive elements to achieve robust power detection.
5. The computer device as claimed in claim 4 , wherein the detection circuit further comprises: a first transistor, coupled to the detection node and comprising a control electrode configured to receive the second enable signal.
A system for detecting electrical signals in a computer device includes a detection circuit that identifies voltage changes at a detection node. The detection circuit includes a first transistor coupled to the detection node, with a control electrode that receives a second enable signal. This transistor regulates current flow based on the enable signal, allowing precise detection of voltage variations. The detection circuit may also include a second transistor coupled to the detection node, with a control electrode receiving a first enable signal, further refining signal detection. The system may also include a voltage divider circuit that generates a reference voltage for comparison with the detected voltage, ensuring accurate signal identification. The detection circuit operates in conjunction with a control circuit that processes the detected signals, enabling the computer device to respond to specific voltage conditions. This invention addresses the need for reliable signal detection in electronic systems, particularly in environments with varying voltage levels or noise interference. The use of enable signals allows selective activation of detection components, improving efficiency and accuracy. The system is applicable in digital circuits, power management, and signal processing applications where precise voltage monitoring is required.
6. The computer device as claimed in claim 4 , wherein the detection circuit further comprises: a second transistor, coupled between the detection node and a detection signal output terminal, wherein the detection signal output terminal is configured to output the first detection signal.
This invention relates to a computer device with an improved detection circuit for generating a detection signal. The detection circuit includes a second transistor coupled between a detection node and a detection signal output terminal, where the output terminal provides the first detection signal. The detection circuit is designed to enhance signal detection accuracy and reliability in computing systems, particularly in scenarios where precise signal monitoring is critical. The second transistor acts as a switching element, controlling the flow of electrical signals from the detection node to the output terminal. This configuration ensures that the detection signal is accurately transmitted while minimizing noise and interference. The detection node may be connected to other components within the computer device, such as sensors or processing units, to gather data for analysis. The detection signal output terminal interfaces with downstream circuits or processors to facilitate further signal processing or decision-making. This design improves the overall performance and efficiency of the detection system within the computer device.
7. A power abnormality detection method, suitable for a computer device which is coupled to a peripheral device, the computer device comprising a voltage converter circuit and a detection circuit, the voltage converter circuit being configured to convert a first voltage into a second voltage, the detection circuit being configured to detect whether a power abnormality at the peripheral device has occurred, the method comprising: detecting whether a system power of the computer device is being supplied normally; when confirming that the system power is being supplied normally, waiting for a first predetermined period of time and then generating a first enable signal to enable the voltage converter circuit when the first predetermined period of time expires; detecting whether the voltage converter circuit functions normally; when confirming that the voltage converter circuit functions normally, generating a second enable signal to enable the detection circuit; detecting whether a power abnormality at the peripheral device has occurred and generating a first detection signal based on a corresponding detection result; determining whether to supply the second voltage to the peripheral device according to the first detection signal, wherein when the first detection signal indicates that a power abnormality has not occurred at the peripheral device, supplying the second voltage to the peripheral device, detecting whether the second voltage is supplied normally and generating a second detection signal based on a corresponding result; and detecting whether an output current of the voltage converter circuit is overloaded and generating a third detection signal based on a corresponding detection result; and generating the second enable signal according to the second detection signal and the third detection signal.
This invention relates to a power abnormality detection method for computer systems interfacing with peripheral devices. The method addresses the challenge of ensuring stable power delivery to peripheral devices while detecting and mitigating power-related faults in real-time. The system includes a computer device with a voltage converter circuit and a detection circuit. The voltage converter circuit transforms an input voltage to a regulated output voltage for the peripheral device. The detection circuit monitors power conditions to prevent damage from abnormalities. The method begins by verifying normal system power supply. If confirmed, it waits for a predefined delay before activating the voltage converter circuit. The converter's functionality is then checked, and if operational, the detection circuit is enabled. The detection circuit monitors the peripheral device for power abnormalities, generating a signal indicating whether power is stable. Based on this signal, the system decides whether to supply the converted voltage to the peripheral device. If power is stable, the system further checks for normal voltage delivery and monitors the converter's output current for overload conditions. The detection circuit's enable signal is adjusted based on these voltage and current checks to ensure safe operation. This approach enhances system reliability by dynamically responding to power fluctuations and potential faults.
8. The power abnormality detection method as claimed in claim 7 , wherein performance of the step of detecting whether a power abnormality at the peripheral device has occurred has lasted for a second predetermined period of time.
A power abnormality detection method is used in systems where a host device monitors the power status of connected peripheral devices to ensure stable operation. The method involves detecting whether a power abnormality, such as a voltage drop or power loss, has occurred at a peripheral device. If an abnormality is detected, the host device takes corrective action, such as adjusting power distribution or notifying the user. The detection process is continuous and operates for a second predetermined period of time, ensuring sustained monitoring to prevent prolonged power issues. This method helps maintain system reliability by promptly identifying and addressing power-related faults in peripheral devices. The technique is particularly useful in computing systems, industrial equipment, or any setup where peripheral devices rely on stable power from a host device. The method may also include additional steps, such as logging the abnormality or triggering a safety protocol, to further enhance system robustness. By enforcing a fixed monitoring duration, the method ensures consistent and reliable detection of power anomalies.
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May 5, 2020
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