Legal claims defining the scope of protection. Each claim is shown in both the original legal language and a plain English translation.
1. Node circuitry for communication along a two-wire communication bus, comprising: a transceiver to couple to a link of the two-wire communication bus and to receive data via the link; and digital interface circuitry to support communication in accordance with a first digital interface protocol; wherein the data received via the link of the two-wire communication bus includes commands in accordance with a second digital interface protocol different from the first digital interface protocol, and the digital interface circuitry is communicatively coupled to the transceiver to transmit the commands to a peripheral device in accordance with the second digital interface protocol.
The invention relates to node circuitry designed for communication over a two-wire bus, addressing the challenge of interfacing between different digital protocols in embedded systems. The circuitry includes a transceiver that connects to a link of the two-wire bus to receive data, and digital interface circuitry that supports communication using a first digital interface protocol. The received data over the two-wire bus contains commands formatted according to a second digital interface protocol, which differs from the first. The digital interface circuitry is directly coupled to the transceiver to convert and transmit these commands to a peripheral device using the second protocol. This enables seamless communication between devices operating on different protocols without requiring additional conversion hardware, simplifying system integration. The solution is particularly useful in applications where multiple protocols must coexist, such as industrial automation, sensor networks, or consumer electronics, where compatibility and efficiency are critical. The circuitry ensures that commands are properly translated and transmitted, maintaining data integrity and reducing complexity in multi-protocol environments.
2. The node circuitry of claim 1 , wherein the received data is Manchester encoded.
A system for processing data in a network node includes circuitry that receives and decodes Manchester-encoded data. Manchester encoding is a line code where data and clock signals are combined, ensuring reliable synchronization and error detection. The node circuitry is designed to handle this encoding scheme, which alternates between high and low voltage levels to represent binary data, typically with a transition at the midpoint of each bit period. This encoding method is commonly used in networking and communication systems to maintain signal integrity and timing accuracy. The node circuitry processes the received Manchester-encoded data, extracting the embedded clock and data signals for further transmission or analysis. The system ensures robust data transmission by leveraging the inherent properties of Manchester encoding, such as self-clocking and balanced transitions, which reduce electromagnetic interference and improve signal reliability. The circuitry may include components for signal conditioning, decoding, and error checking to ensure accurate data recovery. This approach is particularly useful in environments where signal integrity and timing are critical, such as in high-speed communication networks or industrial control systems.
3. The node circuitry of claim 1 , wherein the first digital interface protocol is Inter-IC Sound (I2S), Time Division Multiplexing (TDM), or Pulse Density Modulation (PDM).
This invention relates to node circuitry for digital audio signal processing, addressing the need for flexible and efficient interfacing between audio processing nodes. The circuitry includes a digital interface configured to support multiple audio protocols, enabling seamless communication between different audio processing components. The key innovation lies in the ability to handle various digital interface protocols, including Inter-IC Sound (I2S), Time Division Multiplexing (TDM), and Pulse Density Modulation (PDM). These protocols are commonly used in audio systems to transmit digital audio data between devices, such as microcontrollers, digital signal processors, and audio codecs. By supporting multiple protocols, the node circuitry ensures compatibility with a wide range of audio hardware, simplifying system integration and reducing design complexity. The circuitry may also include additional features, such as signal conditioning, clock synchronization, and data formatting, to optimize audio signal quality and reliability. This flexibility makes the node circuitry suitable for applications in consumer electronics, automotive audio systems, and professional audio equipment, where interoperability between different audio components is critical. The invention enhances the versatility of audio processing systems by providing a unified interface solution that adapts to various digital audio standards.
4. The node circuitry of claim 1 , wherein the second digital interface protocol is Serial Peripheral Interface (SPI), Controller Area Network (CAN), Universal Asynchronous Receiver Transmitter (UART), or Musical Instrument Digital Interface (MIDI).
This invention relates to node circuitry for interfacing between different digital communication protocols in embedded systems or industrial control applications. The circuitry enables seamless communication between devices using incompatible protocols, addressing the challenge of integrating diverse hardware components in complex systems. The primary node circuitry includes a first digital interface for a first protocol and a second digital interface for a second protocol, with conversion logic to translate data between the two protocols. The second digital interface supports multiple standard protocols, including Serial Peripheral Interface (SPI), Controller Area Network (CAN), Universal Asynchronous Receiver Transmitter (UART), or Musical Instrument Digital Interface (MIDI). This flexibility allows the node circuitry to act as a bridge between devices using any of these protocols, ensuring interoperability in applications such as industrial automation, consumer electronics, or multimedia systems. The conversion logic ensures data integrity and timing synchronization, enabling real-time communication where required. The circuitry may also include error detection and correction mechanisms to enhance reliability in noisy environments. By supporting multiple protocols, the invention simplifies system design and reduces the need for multiple dedicated interface modules, lowering cost and complexity.
5. The node circuitry of claim 1 , wherein the digital interface circuitry is to receive data from the peripheral device in accordance with the second digital interface protocol.
A system for interfacing with peripheral devices includes node circuitry that facilitates communication between a host system and a peripheral device using multiple digital interface protocols. The node circuitry includes digital interface circuitry that supports at least two different digital interface protocols, such as USB, PCIe, or Thunderbolt. The circuitry is configured to dynamically switch between these protocols based on the requirements of the connected peripheral device. The node circuitry also includes control logic that manages the protocol selection and data routing, ensuring compatibility and efficient data transfer. The digital interface circuitry is specifically designed to receive data from the peripheral device in accordance with a second digital interface protocol, allowing for bidirectional communication. This system addresses the challenge of integrating diverse peripheral devices with varying interface requirements into a unified host system, improving flexibility and reducing the need for multiple dedicated interfaces. The solution enables seamless communication by dynamically adapting to the protocol used by the connected device, enhancing compatibility and performance.
6. The node circuitry of claim 1 , wherein: the transceiver is an upstream transceiver, the link is an upstream link, and the node circuitry further includes a downstream transceiver to couple to a downstream link of the two-wire communication bus and to receive and transmit data via the downstream link; or the transceiver is a downstream transceiver, the link is a downstream link, and the node circuitry further includes an upstream transceiver to couple to an upstream link of the two-wire communication bus and to receive and transmit data via the downstream link.
This invention relates to node circuitry for a two-wire communication bus, addressing the need for efficient data transmission in bidirectional communication systems. The circuitry includes a transceiver that couples to either an upstream or downstream link of the bus, enabling data reception and transmission. In one configuration, the transceiver is an upstream transceiver connected to an upstream link, and the circuitry further includes a downstream transceiver coupled to a downstream link, allowing bidirectional communication. In another configuration, the transceiver is a downstream transceiver connected to a downstream link, and the circuitry includes an upstream transceiver coupled to an upstream link, also enabling bidirectional data exchange. The design ensures seamless data flow in both directions, improving communication efficiency in two-wire bus systems. The circuitry may be part of a larger network node, facilitating data routing and processing between upstream and downstream segments of the bus. The invention optimizes signal transmission and reception, reducing latency and enhancing reliability in bidirectional communication networks.
7. The node circuitry of claim 1 , wherein the digital interface circuitry includes a first processing device to translate the data received by the transceiver into a form compatible with the first digital interface protocol, and the digital interface circuitry includes a second processing device to translate the translated data into the form compatible with the second digital interface protocol.
This invention relates to node circuitry for interfacing between different digital communication protocols. The problem addressed is the need to efficiently and accurately convert data between incompatible digital interface protocols in a network node. The node circuitry includes a transceiver for receiving and transmitting data, and digital interface circuitry that handles protocol translation. The digital interface circuitry contains a first processing device that converts incoming data from the transceiver into a format compatible with a first digital interface protocol. A second processing device within the same digital interface circuitry then further translates this data into a format compatible with a second digital interface protocol. This dual-stage translation ensures seamless communication between systems using different protocols, improving interoperability in heterogeneous networks. The circuitry may be part of a larger system where multiple protocols must coexist, such as in industrial automation, telecommunications, or data center environments. The invention focuses on efficient data processing and protocol conversion to maintain data integrity and reduce latency in mixed-protocol environments.
8. The node circuitry of claim 5 , wherein the peripheral device is a first peripheral device, and the digital interface circuitry is to receive data from a second peripheral device different from the first peripheral device.
This invention relates to node circuitry in a computing system that facilitates communication between a central processing unit (CPU) and multiple peripheral devices. The problem addressed is the need for efficient data transfer between the CPU and diverse peripheral devices, such as storage drives, network adapters, or input/output (I/O) controllers, while minimizing latency and maximizing throughput. The node circuitry includes digital interface circuitry that manages data exchange with at least one peripheral device. The circuitry is designed to handle data transactions, including sending and receiving data, while ensuring compatibility with different types of peripheral devices. The invention specifically addresses scenarios where the node circuitry interacts with multiple peripheral devices, such as a first peripheral device (e.g., a storage drive) and a second peripheral device (e.g., a network adapter). The digital interface circuitry is configured to receive data from the second peripheral device, distinct from the first, enabling simultaneous or sequential data processing from multiple sources. This design improves system efficiency by allowing parallel data operations, reducing bottlenecks, and enhancing overall performance in computing environments where multiple peripherals are active. The circuitry may also include error detection and correction mechanisms to ensure data integrity during transfers. The invention is particularly useful in high-performance computing, data centers, and embedded systems where reliable and fast peripheral communication is critical.
9. The node circuitry of claim 8 , wherein the data received from the second peripheral device is in accordance with a third digital interface protocol different from the second digital interface protocol.
This invention relates to node circuitry for managing data communication between peripheral devices using different digital interface protocols. The problem addressed is the complexity of integrating multiple peripheral devices that operate on distinct protocols, requiring separate interfaces and increasing system overhead. The node circuitry includes a first interface for communicating with a first peripheral device using a first digital interface protocol, and a second interface for communicating with a second peripheral device using a second digital interface protocol. The circuitry further includes a protocol conversion module that translates data between the first and second protocols, enabling seamless communication between the devices. Additionally, the circuitry may include a third interface for a third peripheral device, where the data received from this device follows a third digital interface protocol, distinct from the second protocol. This ensures compatibility with multiple peripheral devices, each operating on different protocols, without requiring separate dedicated interfaces for each device. The system dynamically routes and converts data between the devices, reducing hardware complexity and improving efficiency in multi-protocol environments.
10. The node circuitry of claim 8 , wherein the digital interface circuitry is to receive data from the first peripheral device simultaneously with receiving data from the second peripheral device.
A system for managing data transfer between multiple peripheral devices and a host device includes node circuitry with digital interface circuitry that supports simultaneous data reception from two or more peripheral devices. The node circuitry acts as an intermediary, facilitating communication between the peripheral devices and the host device. The digital interface circuitry is configured to handle data streams from multiple sources concurrently, ensuring efficient data transfer without conflicts. This design addresses the challenge of managing multiple peripheral devices in a system where data must be processed in real-time, such as in high-speed data processing or multimedia applications. The node circuitry may include additional features like data buffering, protocol conversion, or error correction to enhance reliability and performance. By enabling simultaneous data reception, the system improves throughput and reduces latency, making it suitable for applications requiring high-bandwidth, low-latency communication between multiple devices. The invention optimizes resource utilization by allowing the host device to process data from multiple peripherals without requiring separate dedicated interfaces for each device.
11. The node circuitry of claim 9 , wherein the third digital interface protocol is Inter-IC Sound (I2S) and the first digital interface protocol is Serial Peripheral Interface (SPI).
This invention relates to node circuitry for interfacing between different digital communication protocols in embedded systems. The problem addressed is the need for efficient and flexible data transfer between devices using incompatible digital interface protocols, such as those found in audio processing, sensor networks, or microcontroller applications. The node circuitry includes a first digital interface configured to communicate using a first digital interface protocol, a second digital interface configured to communicate using a second digital interface protocol, and a third digital interface configured to communicate using a third digital interface protocol. The circuitry further includes a processing unit that converts data between the different protocols, enabling seamless communication between devices that would otherwise be incompatible. Specifically, the third digital interface protocol is Inter-IC Sound (I2S), commonly used for audio data transmission, while the first digital interface protocol is Serial Peripheral Interface (SPI), a widely used synchronous serial communication protocol. The second digital interface protocol may be another standard, such as Pulse-Width Modulation (PWM) or a proprietary protocol. The processing unit ensures proper data formatting, timing, and synchronization between these interfaces, allowing devices to exchange data without requiring additional external conversion hardware. This solution simplifies system design by integrating multiple protocol conversions into a single node, reducing complexity and cost.
12. A system for communicating via a digital interface over a two-wire communication bus, comprising: a master device including a transceiver to couple to a link of the two-wire communication bus and to receive and transmit data via the link; a slave device including a transceiver to couple to the link of the two-wire communication bus and to receive and transmit data via the link; the link of the two-wire communication bus; and a peripheral device, coupled to the slave device via a digital interface of the slave device, wherein the digital interface supports a first digital interface protocol, and the peripheral device communicates in accordance with a second digital interface protocol different from the first digital interface protocol; wherein data transmitted by the peripheral device in accordance with the second digital interface protocol is received at the digital interface of the slave device, and the slave device is to translate the data for transmission to the master device via the link of the two-wire communication bus.
The system enables communication between a master device and a peripheral device over a two-wire bus, where the peripheral device uses a different digital interface protocol than the slave device. The system includes a master device with a transceiver connected to a two-wire communication bus link, allowing it to send and receive data. A slave device, also with a transceiver, connects to the same bus link and communicates with the master device. The slave device has a digital interface that supports a first protocol, while the peripheral device operates on a second, incompatible protocol. The slave device receives data from the peripheral device in the second protocol, translates it, and transmits it to the master device over the two-wire bus. This allows seamless communication between devices using different protocols without requiring direct compatibility. The system ensures efficient data exchange by handling protocol conversion at the slave device level, bridging the gap between mismatched interfaces.
13. The system of claim 12 , wherein the first digital interface protocol is Inter-IC Sound (I2S), Time Division Multiplexing (TDM), or Pulse Density Modulation (PDM).
This invention relates to digital audio systems, specifically addressing the challenge of efficiently transmitting audio data between components using different digital interface protocols. The system enables seamless communication between audio processing units, such as digital signal processors (DSPs) or microcontrollers, and peripheral devices like audio codecs or amplifiers. The core functionality involves converting audio data between multiple digital interface protocols to ensure compatibility across diverse hardware configurations. The system includes a protocol conversion module that dynamically selects and applies the appropriate conversion algorithm based on the input and output protocols. Supported protocols include Inter-IC Sound (I2S), Time Division Multiplexing (TDM), and Pulse Density Modulation (PDM), which are commonly used in audio applications. The system also incorporates error detection and correction mechanisms to maintain data integrity during protocol transitions. Additionally, it supports real-time synchronization to prevent audio glitches or latency issues. The invention is particularly useful in embedded audio systems, where hardware components may use different protocols, and ensures high-quality audio transmission without requiring extensive redesign of existing systems.
14. The system of claim 12 , wherein the second digital interface protocol is Serial Peripheral Interface (SPI), Controller Area Network (CAN), Universal Asynchronous Receiver Transmitter (UART), or Musical Instrument Digital Interface (MIDI).
This invention relates to a system for interfacing between a first digital interface protocol and a second digital interface protocol. The system addresses the challenge of enabling communication between devices that use different digital communication protocols, which can otherwise require complex and costly hardware or software adaptations. The system includes a first interface module configured to receive data from a first device using a first digital interface protocol, and a second interface module configured to transmit data to a second device using a second digital interface protocol. The system further includes a protocol conversion module that converts data between the first and second digital interface protocols, ensuring seamless communication between the devices. The second digital interface protocol can be Serial Peripheral Interface (SPI), Controller Area Network (CAN), Universal Asynchronous Receiver Transmitter (UART), or Musical Instrument Digital Interface (MIDI). The system may also include a processing unit to manage the conversion process and ensure data integrity. This approach simplifies integration of devices with different communication standards, reducing development time and cost while improving interoperability.
15. The system of claim 12 , wherein the peripheral device includes a memory device or an audio source.
A system for managing peripheral devices in a computing environment addresses the challenge of efficiently integrating and controlling various peripheral devices with a host system. The system includes a host device with a processor and a peripheral device interface, along with a peripheral device that connects to the host device. The peripheral device interface facilitates communication between the host device and the peripheral device, enabling data transfer and control signals. The system further includes a controller within the host device that manages the peripheral device interface and processes data exchanged between the host device and the peripheral device. The controller ensures compatibility and optimal performance by handling protocol conversions, error detection, and data buffering. The peripheral device may include a memory device, such as a storage drive or flash memory, or an audio source, such as a microphone or audio player. The system dynamically adjusts settings based on the type of peripheral device connected, ensuring seamless operation and enhanced user experience. This approach simplifies peripheral device integration, reduces compatibility issues, and improves overall system efficiency.
16. The system of claim 12 , wherein the system is included in a vehicle.
17. The system of claim 12 , wherein the master device is included in a head unit of a vehicle.
A system for vehicle-based communication and control integrates a master device within the head unit of a vehicle. The master device manages communication between multiple slave devices, such as sensors, actuators, or other electronic components, using a network protocol. The system ensures synchronized data exchange and command execution across the vehicle's subsystems. The master device coordinates timing, prioritizes messages, and handles error detection to maintain reliable operation. This architecture simplifies wiring and reduces latency by centralizing control functions within the head unit, which typically houses the vehicle's primary display and infotainment system. The system may also support diagnostic functions, allowing the master device to monitor and report the status of connected slave devices. By embedding the master device in the head unit, the system leverages existing vehicle infrastructure while improving communication efficiency and system integration. This approach is particularly useful in modern vehicles where multiple electronic systems must operate cohesively.
18. A method of communicating data in accordance with a non-native digital interface protocol over a two-wire communication bus, comprising: receiving, at a node over a link of a two-wire communication bus, data for communication to a peripheral device in accordance with a first digital interface protocol, wherein the digital interface protocol includes Serial Peripheral Interface (SPI), Controller Area Network (CAN), Universal Asynchronous Receiver Transmitter (UART), or Musical Instrument Digital Interface (MIDI); and transmitting, by the node via digital interface circuitry to the peripheral device, the data, wherein the digital interface circuitry supports a second digital interface protocol different from the first digital interface protocol.
This invention addresses the challenge of communicating data between devices using incompatible digital interface protocols over a two-wire communication bus. The method enables seamless data transmission between a node and a peripheral device when their respective protocols are mismatched. The system receives data at a node over a two-wire bus, where the data is formatted according to a first protocol such as Serial Peripheral Interface (SPI), Controller Area Network (CAN), Universal Asynchronous Receiver Transmitter (UART), or Musical Instrument Digital Interface (MIDI). The node then converts and transmits this data to a peripheral device using digital interface circuitry that supports a second, different protocol. This approach allows devices with non-native protocols to communicate effectively over a shared two-wire bus, eliminating the need for separate, dedicated interfaces. The method ensures compatibility and interoperability between devices that would otherwise be unable to exchange data directly. The solution is particularly useful in embedded systems, industrial automation, and multimedia applications where multiple protocols coexist.
19. The method of claim 18 , wherein the second digital interface protocol includes Inter-IC Sound (I2S), Time Division Multiplexing (TDM), or Pulse Density Modulation (PDM).
This invention relates to digital audio signal processing systems, specifically methods for interfacing between different digital audio protocols. The problem addressed is the need for efficient and flexible conversion between multiple digital audio interface protocols, such as Inter-IC Sound (I2S), Time Division Multiplexing (TDM), and Pulse Density Modulation (PDM), to enable seamless integration of audio components in electronic devices. The method involves a digital audio interface system that dynamically selects and converts between these protocols to ensure compatibility across different audio processing modules. The system includes a protocol detection module that identifies the incoming digital audio protocol and a conversion module that transforms the audio data into the required output protocol. The conversion process maintains synchronization and data integrity while minimizing latency. This approach allows audio devices to support multiple protocols without requiring separate hardware for each, reducing complexity and cost. The method is particularly useful in applications where audio components from different manufacturers or standards must interoperate, such as in consumer electronics, automotive systems, and industrial audio equipment. The system ensures high-quality audio transmission by preserving signal fidelity during protocol conversion.
20. The method of claim 18 , wherein the node is a slave node of the two-wire communication bus.
A system and method for managing communication in a two-wire bus network, particularly addressing synchronization and data transfer challenges in distributed systems. The invention involves a master node and at least one slave node connected via a two-wire bus, where the master node controls communication timing and data flow. The slave node, which is the focus of this aspect, operates in a synchronized manner to receive and transmit data according to predefined protocols. The method ensures efficient data exchange by coordinating timing signals between the master and slave nodes, reducing latency and improving reliability in bus-based communication. The slave node may include circuitry for signal processing, timing synchronization, and data buffering to handle high-speed data transfers while maintaining synchronization with the master node. This approach is particularly useful in industrial automation, sensor networks, and other applications requiring precise timing and low-latency communication over a shared bus. The invention enhances performance by optimizing the slave node's role in the communication process, ensuring seamless integration with the master node and other connected devices.
Unknown
May 12, 2020
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