Legal claims defining the scope of protection. Each claim is shown in both the original legal language and a plain English translation.
1. A display panel, including a display area, a fan-out area located at a periphery of the display area, and a binding area located at a side of the fan-out area facing away from the display area, wherein the display panel comprises: a first short-circuiting bar located in the fan-out area or the binding area and extending along a first direction; a second short-circuiting bar located in the fan-out area or the binding area and extending along the first direction; a third short-circuiting bar located in the fan-out area or the binding area and extending along the first direction; and at least one first power line extending along a second direction intersecting with the first direction, wherein the at least one first power line extends from the binding area passing through the fan-out area to the display area, and is configured to provide a first power signal to a display unit in the display area, and wherein the first short-circuiting bar, the second short-circuiting bar, the third short-circuiting bar, and the at least one first power line are located in a first metal layer, and at least one of the first short-circuiting bar, the second short-circuiting bar and the third short-circuiting bar is insulated from the at least one first power line and does not intersect with the at least one first power line.
A display panel includes a display area, a fan-out area at the periphery of the display area, and a binding area adjacent to the fan-out area opposite the display area. The panel contains three short-circuiting bars and at least one power line. The short-circuiting bars are positioned in either the fan-out area or the binding area and extend along a first direction. The power line extends along a second direction, intersecting the first direction, and runs from the binding area through the fan-out area to the display area to supply power to display units. All components are formed in a single metal layer. At least one of the short-circuiting bars is insulated from the power line and does not intersect it, preventing electrical contact. This design ensures proper power distribution while avoiding short circuits in the panel's peripheral regions. The configuration is particularly useful in display technologies requiring reliable power delivery and fault protection in compact layouts.
2. The display panel according to claim 1 , wherein a signal trace of the display area extends through the fan-out area to be bound to a driving chip in the binding area, and the binding area is arranged between two adjacent first power lines of the at least one first power line, wherein the at least one first power line comprises at least two first power lines.
A display panel includes a display area, a fan-out area, and a binding area. The display area contains pixels for image display, while the fan-out area routes signals from the display area to the binding area, where they connect to a driving chip. The binding area is positioned between two adjacent first power lines, which are part of a set of at least two first power lines. These power lines supply electrical power to the display panel. A signal trace extends from the display area through the fan-out area to the binding area, where it connects to the driving chip. The arrangement ensures efficient signal routing and power distribution while minimizing space usage. The design optimizes the layout of the display panel by integrating the binding area between power lines, reducing interference and improving signal integrity. This configuration is particularly useful in high-resolution displays where compact and efficient wiring is essential. The display panel may also include additional features such as second power lines or other components to enhance performance. The overall structure ensures reliable signal transmission and power delivery, contributing to the display's functionality and durability.
3. The display panel according to claim 2 , wherein at least one of the first short-circuiting bar, the second short-circuiting bar, and the third short-circuiting bar that does not intersect with the at least one first power line is located in the binding area.
A display panel includes a substrate with a display area and a binding area. The display area contains a plurality of pixels, each with a first sub-pixel, a second sub-pixel, and a third sub-pixel. Each sub-pixel is connected to a first power line, a second power line, and a third power line, respectively. The binding area includes a first short-circuiting bar, a second short-circuiting bar, and a third short-circuiting bar. These short-circuiting bars are electrically connected to the first power line, the second power line, and the third power line, respectively. At least one of the short-circuiting bars that does not intersect with the first power line is positioned in the binding area. This configuration ensures proper electrical connection and signal distribution while avoiding interference between the power lines and the short-circuiting bars. The design optimizes the layout of the display panel, improving manufacturing efficiency and reducing defects. The binding area's structure facilitates the connection of external circuits, ensuring stable power supply and signal transmission to the display area. The arrangement of the short-circuiting bars prevents electrical shorts and enhances the reliability of the display panel.
4. The display panel according to claim 1 , wherein the at least one first power line divides into a plurality of first power sub-lines after passing through the fan-out area from the binding area, and the plurality of first power sub-lines each provides a first power signal to the display unit in the display area.
A display panel includes a display area with a display unit, a binding area for connecting external circuits, and a fan-out area between them. The panel has at least one first power line that carries a power signal from the binding area to the display unit. In this design, the first power line splits into multiple first power sub-lines after passing through the fan-out area. Each sub-line independently delivers the power signal to different parts of the display unit in the display area. This configuration improves power distribution efficiency by reducing resistance and ensuring uniform power delivery across the display. The fan-out area facilitates the transition from a concentrated power line to distributed sub-lines, optimizing space and signal integrity. The design is particularly useful in high-resolution or large-area displays where consistent power delivery is critical to performance. The sub-lines may be arranged in a pattern that minimizes interference and maximizes coverage, ensuring reliable operation of the display unit.
5. The display panel according to claim 1 , wherein the first short-circuiting bar is located in the fan-out area and intersects with the at least one first power line, the first short-circuiting bar is connected by a first cross-bridge at an intersecting area where the first short-circuiting bar intersects with the at least one first power line, and the first cross-bridge is located in a second metal layer.
A display panel includes a fan-out area where signal lines extend from a display region to peripheral circuits. The fan-out area often requires multiple metal layers to route power and signal lines efficiently. A first short-circuiting bar is positioned in this fan-out area and intersects with at least one first power line. To prevent electrical shorting at the intersection, a first cross-bridge is used to connect the first short-circuiting bar to the first power line. This cross-bridge is located in a second metal layer, ensuring proper electrical isolation and functionality. The design allows for compact routing while maintaining reliable electrical connections. The short-circuiting bar may be part of a larger circuit structure, such as a common voltage distribution network, and the cross-bridge ensures that the power line remains uninterrupted despite the intersection. This configuration is particularly useful in high-resolution displays where space in the fan-out area is limited.
6. The display panel according to claim 5 , wherein the second short-circuiting bar and the third short-circuiting bar are located in the binding area, and neither the second short-circuiting bar nor the third short-circuiting bar intersects with the at least one first power line.
The invention relates to display panel technology, specifically addressing the design of short-circuiting bars in the binding area of a display panel to prevent interference with power lines. In display panels, short-circuiting bars are used to connect conductive layers or components, but their placement can interfere with power lines, leading to signal disruptions or performance issues. The invention solves this problem by positioning a second and third short-circuiting bar in the binding area of the display panel, ensuring they do not intersect with any first power lines present. This arrangement avoids electrical interference while maintaining the necessary connections for panel functionality. The binding area is a region where external connections are made to the panel, and proper routing of conductive elements is critical to avoid shorts or signal degradation. By strategically placing the short-circuiting bars without crossing the power lines, the invention ensures reliable power distribution and signal integrity. This design is particularly useful in high-resolution or large-area displays where power line density is high, and interference risks are greater. The solution improves manufacturing yield and panel reliability by preventing defects caused by unintended electrical contact between short-circuiting bars and power lines.
7. The display panel according to claim 5 , wherein the first short-circuiting bar is configured to control a green display unit in the display area, the second short-circuiting bar is configured to control a red display unit, and the third short-circuiting bar is configured to control a blue display unit.
This invention relates to display panels, specifically addressing the control of color display units within a display area. The technology aims to improve the management of color sub-pixels in display panels, ensuring precise and independent control of red, green, and blue display units. The display panel includes multiple short-circuiting bars, each dedicated to controlling a specific color display unit. The first short-circuiting bar is configured to control the green display unit, the second short-circuiting bar controls the red display unit, and the third short-circuiting bar controls the blue display unit. This configuration allows for independent and accurate modulation of each color channel, enhancing color accuracy and display performance. The short-circuiting bars are integrated into the display panel structure, ensuring efficient signal routing and minimizing interference between color channels. The invention is particularly useful in high-resolution displays where precise color control is critical, such as in LCD, OLED, or other advanced display technologies. By assigning dedicated short-circuiting bars to each color unit, the display panel achieves improved color uniformity and reduces crosstalk between color channels, leading to better image quality and reliability.
8. The display panel according to claim 5 , wherein the fan-out area comprises a first fan-out area and a second fan-out area, and the second fan-out area is located between the first fan-out area and the binding area; in the second fan-out area, a spacing between adjacent signal traces extended from the display area and close to the binding area is smaller than a spacing between adjacent signal traces extended from the display area and close to the first fan-out area; and the first short-circuiting bar is located in the first fan-out area.
This invention relates to display panel designs, specifically addressing signal trace routing in fan-out areas to improve signal integrity and space efficiency. The display panel includes a display area, a binding area for connecting external circuits, and a fan-out area between them where signal traces extend outward from the display area toward the binding area. The fan-out area is divided into a first fan-out area and a second fan-out area, with the second fan-out area positioned between the first fan-out area and the binding area. In the second fan-out area, signal traces closer to the binding area are spaced more densely (smaller spacing) than those closer to the first fan-out area. Additionally, a first short-circuiting bar is located in the first fan-out area, likely for electrical shielding or grounding purposes. This design optimizes signal routing by reducing trace spacing near the binding area, which may help minimize signal interference or improve manufacturing yield, while the short-circuiting bar in the first fan-out area may enhance electrical performance. The invention aims to balance signal integrity, space utilization, and manufacturing feasibility in display panel designs.
9. The display panel according to claim 5 , wherein the first cross-bridge has a resistivity larger than a resistivity of the first short-circuiting bar.
A display panel includes a plurality of pixel circuits arranged in rows and columns, where each pixel circuit is connected to a data line and a scan line. The panel also includes a first cross-bridge and a first short-circuiting bar. The first cross-bridge electrically connects a first data line to a second data line, and the first short-circuiting bar electrically connects a first scan line to a second scan line. The first cross-bridge has a resistivity that is higher than the resistivity of the first short-circuiting bar. This design ensures that during a short-circuit event, current preferentially flows through the short-circuiting bar rather than the cross-bridge, reducing the risk of voltage drops or signal interference in the data lines. The higher resistivity of the cross-bridge prevents excessive current from passing through it, while the lower resistivity of the short-circuiting bar allows for efficient current flow, maintaining proper signal integrity in the scan lines. This configuration improves the reliability and performance of the display panel by minimizing the impact of short-circuit events on the display's functionality.
10. The display panel according to claim 5 , wherein the first short-circuiting bar has a width in the second direction larger than a width of the second short-circuiting bar in the second direction or larger than a width of the third short-circuiting bar in the second direction.
This invention relates to display panels, specifically addressing the design of short-circuiting bars used in such panels. The problem being solved involves optimizing the electrical performance and reliability of display panels by improving the structure of short-circuiting bars, which are critical for ensuring proper electrical connections and preventing defects. The display panel includes multiple short-circuiting bars arranged in a specific configuration. The first short-circuiting bar is designed with a width in a second direction (typically perpendicular to the length of the bars) that is larger than the width of the second short-circuiting bar or the third short-circuiting bar in the same direction. This wider design enhances electrical conductivity and reduces resistance, improving signal transmission and overall panel performance. The second and third short-circuiting bars may have narrower widths, allowing for more compact layouts while maintaining functionality. The invention ensures that the first short-circuiting bar, which may handle higher currents or critical signals, has superior conductivity compared to the other bars. This design choice helps prevent voltage drops, signal degradation, and potential failures in the display panel. The arrangement and width differences between the bars are optimized to balance electrical performance, manufacturing feasibility, and space constraints. This solution is particularly useful in high-resolution or large-area display panels where electrical reliability is paramount.
11. The display panel according to claim 5 , wherein the first short-circuiting bar, the second short-circuiting bar and the third short-circuiting bar have an equivalent width in the second direction.
A display panel includes a substrate, a plurality of gate lines, a plurality of data lines, and a plurality of pixels arranged in a matrix. The gate lines extend in a first direction, and the data lines extend in a second direction perpendicular to the first direction. Each pixel includes a thin-film transistor (TFT) and a pixel electrode. The display panel also includes a first short-circuiting bar, a second short-circuiting bar, and a third short-circuiting bar, each extending in the first direction. The first short-circuiting bar is electrically connected to the gate lines, the second short-circuiting bar is electrically connected to the data lines, and the third short-circuiting bar is electrically connected to a common electrode. The first, second, and third short-circuiting bars have an equivalent width in the second direction, ensuring uniform electrical characteristics and reducing resistance variations across the display panel. This design helps prevent static electricity damage and improves the reliability of the display panel by providing balanced electrical connections for the gate lines, data lines, and common electrode. The short-circuiting bars are positioned at the periphery of the display area to facilitate electrical testing and repair processes.
12. The display panel according to claim 1 , wherein the at least one first power line comprises two first power lines.
A display panel includes a substrate, a display area, and a peripheral area surrounding the display area. The display area contains pixels for displaying images, while the peripheral area includes power lines for supplying power to the display area. The display panel has at least one first power line in the peripheral area, which is configured to supply power to the display area. In an improved version, the at least one first power line is implemented as two separate first power lines. These two first power lines are positioned in the peripheral area and are electrically connected to the display area to provide power. The use of two first power lines instead of one may improve power distribution, reduce voltage drops, or enhance reliability in the display panel. The display panel may also include additional components such as a second power line, a signal line, or other circuitry in the peripheral area to support display functionality. The two first power lines are designed to supply power efficiently to the display area while maintaining the structural integrity and performance of the display panel.
13. The display panel according to claim 1 , further comprising: a plurality of data lines each extending along the second direction; a first transistor arranged between a part of the plurality of data lines and the first short-circuiting bar; a second transistor arranged between a part of the plurality of data lines and the second short-circuiting bar; a third transistor arranged between a part of the plurality of data lines and the third short-circuiting bar; a first enable signal line extending along the first direction and configured to control on and off of signal transmission between a part of the plurality of data lines and the first short-circuiting bar; a second enable signal line extending along the first direction and configured to control on and off of signal transmission between a part of the plurality of data lines and the second short-circuiting bar; and a third enable signal line extending along the first direction and configured to control on and off of signal transmission between a part of the plurality of data lines and the third short-circuiting bar.
The invention relates to a display panel with improved signal routing and short-circuiting capabilities. The display panel includes a plurality of data lines extending in a second direction, which are used to transmit data signals to pixels for image display. To enhance reliability and testing, the panel incorporates three short-circuiting bars that can be selectively connected to the data lines via transistors. A first transistor connects a portion of the data lines to a first short-circuiting bar, a second transistor connects another portion to a second short-circuiting bar, and a third transistor connects a further portion to a third short-circuiting bar. The panel also includes three enable signal lines extending in a first direction, perpendicular to the data lines, to control the on/off states of these transistors. The first enable signal line controls the first transistor, the second enable signal line controls the second transistor, and the third enable signal line controls the third transistor. This configuration allows for selective short-circuiting of data lines to their respective bars, facilitating testing, repair, or redundancy in the display panel. The transistors and enable signal lines ensure precise control over signal transmission between the data lines and the short-circuiting bars, improving the panel's functionality and reliability.
14. The display panel according to claim 13 , wherein the first enable signal line is connected to a gate electrode of the first transistor, the second enable signal line is connected to a gate electrode of the second transistor, and the third enable signal line is connected to a gate electrode of the third transistor.
This invention relates to display panel technology, specifically addressing the control of transistors within a display panel to improve functionality and efficiency. The display panel includes a plurality of transistors, each connected to distinct enable signal lines that regulate their operation. The first transistor is controlled by a first enable signal line connected to its gate electrode, the second transistor is controlled by a second enable signal line connected to its gate electrode, and the third transistor is controlled by a third enable signal line connected to its gate electrode. These enable signal lines independently activate or deactivate the respective transistors, allowing for precise control over the display panel's operation. The transistors may be part of a pixel circuit or a driver circuit, where their activation states determine the flow of electrical signals, such as data signals or power signals, within the display panel. By using separate enable signal lines for each transistor, the display panel can achieve more flexible and efficient control, reducing power consumption and improving performance. This configuration is particularly useful in advanced display technologies, such as organic light-emitting diode (OLED) displays, where precise transistor control is essential for maintaining image quality and longevity.
15. The display panel according to claim 13 , wherein the plurality of data lines comprises a first data line and a second data line, the first data line is connected to the first short-circuiting bar through the first transistor, and the second data line is connected to the second short-circuiting bar through the second transistor or connected to the third short-circuiting bar through the third transistor.
A display panel includes a plurality of data lines and short-circuiting bars for testing and repairing electrical connections. The data lines are used to transmit data signals to pixels in the display panel, while the short-circuiting bars are conductive lines that can be temporarily connected to the data lines during manufacturing or testing to verify proper electrical continuity and functionality. The display panel includes transistors that selectively connect the data lines to the short-circuiting bars. Specifically, a first data line is connected to a first short-circuiting bar through a first transistor, while a second data line can be connected to either a second short-circuiting bar through a second transistor or to a third short-circuiting bar through a third transistor. This configuration allows for flexible testing and repair of the data lines by enabling different connection paths between the data lines and the short-circuiting bars. The transistors act as switches, controlled by external signals, to establish or break the connections between the data lines and the short-circuiting bars as needed. This setup ensures that the display panel can be thoroughly tested for defects and that any faulty connections can be identified and repaired efficiently. The use of multiple short-circuiting bars and transistors provides redundancy and flexibility in the testing process, improving the reliability and yield of the display panel manufacturing process.
16. The display panel according to claim 13 , wherein at least one of the first enable signal line, the second enable signal line and the third enable signal line is insulated from the at least one first power line and does not intersect with the at least one first power line.
A display panel includes a plurality of pixels arranged in rows and columns, each pixel having a light-emitting element and a driving circuit. The driving circuit includes a first transistor, a second transistor, and a third transistor. The first transistor controls current flow to the light-emitting element, the second transistor provides a reference voltage, and the third transistor compensates for threshold voltage variations. The display panel also includes a first enable signal line, a second enable signal line, and a third enable signal line, each connected to respective transistors to control their operation. Additionally, the display panel has at least one first power line supplying power to the pixels. In this configuration, at least one of the enable signal lines is insulated from and does not intersect with the first power line, reducing signal interference and improving display performance. This design minimizes electrical crosstalk between the enable signals and the power lines, ensuring stable operation of the driving circuits and enhancing image quality. The insulated and non-intersecting arrangement simplifies the panel's wiring layout while maintaining reliable signal transmission.
17. The display panel according to claim 13 , wherein one of the first enable signal line, the second enable signal line and the third enable signal line that does not intersect with the at least one first power line is located in the binding area.
A display panel includes a plurality of power lines and enable signal lines for controlling display elements. The panel has a binding area where external connections are made. The invention addresses the challenge of efficiently routing signal lines in a display panel while avoiding interference with power lines. The panel includes at least one first power line and multiple enable signal lines (first, second, and third) that control different functions. To optimize space and reduce signal interference, one of the enable signal lines that does not intersect with the first power line is routed through the binding area. This configuration ensures that signal integrity is maintained while minimizing the footprint of the wiring. The binding area is used strategically to accommodate signal lines that would otherwise cross power lines, improving the overall layout efficiency. The display panel may also include additional features such as a second power line and a third power line, which are arranged to avoid overlapping with the enable signal lines, further enhancing signal stability. The invention is particularly useful in high-resolution displays where precise signal routing is critical to performance.
18. The display panel according to claim 13 , wherein a display stage of the display panel comprises a visual test stage, and the first transistor, the second transistor or the third transistor is turned on only during the visual test stage.
This invention relates to display panels, specifically addressing the challenge of reducing power consumption and improving reliability during visual testing of display devices. The display panel includes a display stage that incorporates a visual test stage, during which only one of three transistors—first, second, or third—is activated. These transistors are part of the panel's circuitry and are selectively turned on during the visual test stage to verify display functionality without continuously operating all components. The first transistor may control a gate line, the second transistor may control a data line, and the third transistor may control a pixel circuit. By limiting transistor activation to the test stage, the invention minimizes unnecessary power consumption and reduces stress on the display components, enhancing long-term reliability. The visual test stage ensures that the display panel operates correctly before full operation, while the selective activation of transistors optimizes efficiency. This approach is particularly useful in applications requiring frequent testing, such as manufacturing quality control or diagnostic procedures. The invention improves energy efficiency and extends the lifespan of display panels by avoiding continuous activation of all transistors during testing.
19. A display device, comprising a display panel, the display panel including a display area, a fan-out area located at a periphery of the display area, and a binding area located at a side of the fan-out area facing away from the display area, wherein the display panel comprises: a first short-circuiting bar located in the fan-out area or the binding area and extending along a first direction; a second short-circuiting bar located in the fan-out area or the binding area and extending along the first direction; a third short-circuiting bar located in the fan-out area or the binding area and extending along the first direction; and at least one first power line extending along a second direction intersecting with the first direction, wherein the at least one first power line extends from the binding area passing through the fan-out area to the display area, and is configured to provide a first power signal to a display unit in the display area, and wherein the first short-circuiting bar, the second short-circuiting bar, the third short-circuiting bar, and the at least one first power line are located in a first metal layer, and at least one of the first short-circuiting bar, the second short-circuiting bar and the third short-circuiting bar is insulated from the at least one first power line and does not intersect with the at least one first power line.
A display device includes a display panel with a display area, a fan-out area at the periphery of the display area, and a binding area adjacent to the fan-out area. The display panel contains multiple short-circuiting bars and power lines. Specifically, a first, second, and third short-circuiting bar are positioned in either the fan-out or binding area, all extending along a first direction. At least one power line extends along a second direction, intersecting the first direction, and runs from the binding area through the fan-out area into the display area to supply power to display units. All these components are located in a single metal layer. At least one of the short-circuiting bars is insulated from the power line and does not intersect it, preventing electrical interference. This design ensures efficient power distribution while maintaining electrical isolation between critical components, addressing issues of signal integrity and reliability in display panel manufacturing. The configuration optimizes space utilization in the fan-out and binding areas, which are constrained regions, while ensuring proper power delivery to the display area.
Unknown
June 30, 2020
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