Legal claims defining the scope of protection. Each claim is shown in both the original legal language and a plain English translation.
1. A method of determining a mix mask for efficiently translating compressed instructions, the method comprising: breeding pairs of seed mix masks represented as genes from a seed population of seed mix masks to produce pairs of complementary offspring mix masks, wherein breeding comprises exchanging the genes at a crossover point and a first mask of the offspring mix masks is a complement of a second mask of the offspring mix masks; mutating the offspring mix masks to produce mutated offspring mix masks that update the seed population; and determining the mix mask from the updated seed population, wherein patterns of bits are combined according to the determined mix mask to translate compressed instructions of a program to executable form.
This invention relates to optimizing the translation of compressed instructions in computing systems. The problem addressed is the inefficiency in translating compressed instructions into executable form, particularly in systems where instruction compression is used to reduce memory usage or bandwidth. The solution involves a genetic algorithm approach to determine an optimal mix mask for efficient instruction translation. The method begins with a seed population of mix masks, where each mask is represented as a set of genes. Pairs of seed mix masks are bred to produce complementary offspring mix masks. Breeding involves exchanging genes at a crossover point, ensuring that one offspring mask is the complement of the other. These offspring masks are then mutated to generate mutated offspring, which update the seed population. From this updated population, a mix mask is selected. The selected mix mask defines how patterns of bits are combined to translate compressed instructions into executable form, improving translation efficiency. The genetic algorithm approach allows for the evolution of an optimal mix mask over time, adapting to the specific patterns in the compressed instructions. This method is particularly useful in systems where instruction compression is employed, such as embedded systems or low-power devices, where efficient translation is critical for performance.
2. The method of claim 1 , wherein breeding further comprises: randomly selecting the crossover point in a pair of seed mix masks identified as parent A and parent B; and producing an offspring mix mask by concatenating a leftmost set of bits from before the crossover point from either parent A or B and a rightmost set of bits starting from after the crossover point from the parent not used to select the leftmost set of bits.
This invention relates to a method for generating offspring mix masks through a genetic algorithm-based breeding process. The method addresses the challenge of efficiently creating new mix masks by leveraging crossover techniques from genetic algorithms. A mix mask is a binary sequence used in various applications, such as data processing or encryption, where new variations are needed to improve performance or security. The breeding process involves selecting two parent mix masks, labeled as parent A and parent B. A crossover point is randomly chosen within the binary sequences of these parents. The offspring mix mask is generated by combining a left portion of bits from one parent (either A or B) up to the crossover point with a right portion of bits from the other parent starting from the crossover point onward. This ensures that the offspring inherits a mix of traits from both parents, promoting diversity and potentially improving the effectiveness of the mix mask in its intended application. The method is particularly useful in iterative optimization processes where new variations must be generated efficiently while maintaining desirable characteristics from previous generations.
3. The method of claim 1 , further comprising: breeding based on a randomly selected crossover point in the pairs of seed mix masks.
The invention relates to genetic algorithms and optimization techniques, specifically improving the breeding process in evolutionary algorithms. The problem addressed is the inefficiency in traditional crossover methods, which often rely on fixed or deterministic crossover points, leading to suboptimal solutions and limited genetic diversity. The method involves generating pairs of seed mix masks, which are binary or multi-valued templates representing genetic material. These masks are used to control the crossover process between parent solutions in a population. The improvement lies in selecting a crossover point randomly within the pairs of seed mix masks, rather than using predetermined or fixed points. This random selection enhances genetic diversity by introducing variability in how parent solutions are combined, leading to more robust exploration of the solution space. The method ensures that the crossover process is not biased toward specific regions of the genetic material, preventing premature convergence and improving the algorithm's ability to escape local optima. By randomly varying the crossover point, the algorithm can explore a wider range of potential solutions, increasing the likelihood of finding a globally optimal or near-optimal solution. This approach is particularly useful in complex optimization problems where traditional crossover methods may struggle to maintain diversity and avoid stagnation.
4. The method of claim 1 , wherein mutating further comprises: randomly inverting an individual bit in one of a pair of complementary offspring mix masks to determine a mutated offspring mix mask; and replacing a seed mix mask in the seed population with the mutated offspring mix mask.
This invention relates to genetic algorithms used for optimization, specifically improving the mutation process in evolutionary computation. The problem addressed is the need for efficient and effective mutation techniques to explore solution spaces in optimization problems. Traditional mutation methods may struggle with balancing exploration and exploitation, leading to suboptimal convergence. The method involves generating offspring mix masks through crossover operations and then applying a targeted mutation step. The mutation process randomly inverts a single bit in one of a pair of complementary offspring mix masks, creating a mutated offspring mix mask. This mutated mask is then used to replace a seed mix mask in the seed population. The complementary nature of the masks ensures that the mutation preserves certain structural relationships while introducing variability. This approach enhances the diversity of the population, improving the algorithm's ability to escape local optima and explore the solution space more thoroughly. The method is particularly useful in optimization problems where maintaining a balance between exploration and exploitation is critical, such as in parameter tuning, machine learning, and combinatorial optimization. The random bit inversion ensures simplicity and computational efficiency, while the replacement of a seed mask ensures that the population evolves over generations.
5. The method of claim 1 , wherein the program includes boot code, operating system code, and multiple application programs.
A method for managing software execution in a computing system addresses the challenge of efficiently loading and executing multiple software components during system startup. The method involves a program that includes boot code, operating system code, and multiple application programs. The boot code is responsible for initializing hardware and loading the operating system, which then manages system resources and provides a platform for running applications. The multiple application programs are designed to perform specific tasks or functions within the operating system environment. The method ensures that the boot code, operating system, and applications are properly loaded and executed in a coordinated sequence, optimizing system performance and reliability. This approach streamlines the startup process, reduces boot time, and enhances system stability by ensuring all necessary software components are correctly initialized and operational. The method is particularly useful in environments where rapid system initialization and reliable software execution are critical, such as embedded systems, servers, or mobile devices. By integrating boot code, operating system code, and application programs into a cohesive execution framework, the method provides a robust solution for managing complex software environments.
6. The method of claim 1 , further comprising: determining a fitness level for each seed mix mask in the seed population using a current cost of translation hardware associated with each seed mix mask, wherein the fitness level of the seed mix mask represents a level of benefit for providing a high level of compression.
This invention relates to optimizing translation hardware in computing systems, specifically improving compression efficiency by evaluating seed mix masks. The problem addressed is the need to balance hardware cost with compression performance, ensuring that translation hardware achieves high compression levels without excessive resource consumption. The method involves generating a population of seed mix masks, which are configurations used to compress data. Each mask in the population is evaluated based on its fitness level, which is determined by the current cost of the associated translation hardware. The fitness level quantifies how effectively a seed mix mask contributes to high compression, allowing for the selection of the most efficient configurations. This evaluation helps optimize hardware design by identifying masks that provide the best compression benefits at the lowest cost, ensuring resource-efficient translation hardware. The approach enables dynamic adaptation of compression strategies to varying hardware constraints, improving overall system performance.
7. The method of claim 6 , wherein the current cost of translation hardware is based on an X-index and Y-index memory, an X pattern memory, and a Y pattern memory.
This invention relates to a method for determining the cost of translation hardware in a computing system, specifically addressing the challenge of efficiently estimating hardware resource requirements for translation operations. The method calculates the cost based on multiple memory components: an X-index and Y-index memory, an X pattern memory, and a Y pattern memory. The X-index and Y-index memory store address indices used for translation lookups, while the X pattern and Y pattern memory store predefined patterns or mappings that facilitate the translation process. The method evaluates the current cost by analyzing the memory usage and access patterns of these components, allowing for optimized hardware design and resource allocation. By considering these memory elements, the method ensures accurate cost estimation for translation hardware, improving efficiency and performance in systems requiring frequent address translations, such as memory management units or virtualization environments. The approach helps balance hardware complexity and cost while maintaining translation accuracy.
8. The method of claim 6 , further comprising: selecting an initial seed population of seed mix masks to include randomly selected mix masks and previously used mix masks which had a high fitness level for a previous program having instructions that are similar to the instructions used in the program.
This invention relates to optimizing program execution by dynamically generating and selecting mix masks to improve performance. The problem addressed is the inefficiency in program execution due to suboptimal instruction scheduling and resource utilization, which can be mitigated by applying mix masks that reorder or modify instructions to enhance parallelism and reduce bottlenecks. The method involves generating a population of mix masks, which are templates or patterns that dictate how instructions in a program can be rearranged or modified. These masks are evaluated for their effectiveness in improving program performance, measured by a fitness level. The fitness level quantifies how well a mask optimizes execution time, resource usage, or other performance metrics. To improve efficiency, the method selects an initial seed population of mix masks. This population includes both randomly generated masks and previously used masks that demonstrated high fitness levels in similar programs. By leveraging historical data from programs with comparable instruction sets, the method accelerates the optimization process, reducing the need for extensive trial-and-error testing. This approach ensures that the optimization process starts with a strong baseline, increasing the likelihood of quickly identifying effective masks for the current program. The method iteratively refines the mask population, selecting the best-performing masks to guide further optimization.
9. The method of claim 1 , wherein breeding comprises: picking first bits in bit locations in a first bit pattern and then picking second bits in a second bit pattern corresponding to all other bit locations not picked from the first bit pattern; and combining the picked bits to form a first offspring mix mask.
This invention relates to cryptographic key generation, specifically a method for creating offspring mix masks through a breeding process. The problem addressed is the need for secure and efficient key generation in cryptographic systems, where traditional methods may be vulnerable to attacks or lack flexibility. The method involves a breeding process that combines two bit patterns to produce an offspring mix mask. First, specific bits are selected from a first bit pattern at predefined locations. Then, the remaining bits are selected from a second bit pattern, filling in the locations not covered by the first selection. These selected bits are then combined to form the offspring mix mask. This approach ensures that the resulting mask incorporates contributions from both parent patterns, enhancing the security and unpredictability of the generated key. The breeding process is designed to maintain the integrity and randomness of the key material while allowing for controlled variation. By systematically selecting bits from different patterns, the method ensures that the offspring mask retains desirable properties from both parent patterns, such as resistance to cryptographic attacks. This technique is particularly useful in applications requiring robust key generation, such as encryption, authentication, and secure communication protocols. The method provides a structured yet flexible way to produce high-quality cryptographic keys.
10. A translation circuit for translating compressed instructions, configured to: breed pairs of seed mix masks represented as genes from a seed population of seed mix masks to produce pairs of complementary offspring mix masks by exchanging the genes at a crossover point and a first mask of the offspring mix masks is a complement of a second mask of the offspring mix masks; mutate the offspring mix masks to produce mutated offspring mix masks that update the seed population; determine a mix mask from the updated seed population, wherein patterns of bits are combined according to the determined mix mask to translate compressed instructions of a program to executable form; and store the determined mix mask in the updated seed population in a memory.
The invention relates to a translation circuit for converting compressed instructions into executable form using a genetic algorithm approach. The problem addressed is the efficient translation of compressed instructions, which often requires complex decompression techniques that can be computationally expensive or inflexible. The proposed solution leverages evolutionary computation to dynamically generate and optimize mix masks, which are bit patterns used to reconstruct compressed instructions into their executable form. The translation circuit operates by first breeding pairs of seed mix masks, represented as genes, from a seed population. These pairs are combined at a crossover point to produce complementary offspring mix masks, where one mask is the complement of the other. The offspring masks are then mutated to introduce variability, and the mutated masks are used to update the seed population. From this updated population, a mix mask is selected, which defines how bit patterns are combined to translate the compressed instructions into executable form. The selected mix mask is stored back into the seed population for future use. This approach allows the system to adaptively improve the translation process over time, optimizing the decompression of instructions based on evolving patterns in the seed population. The genetic algorithm ensures that the translation remains efficient and accurate, even as the nature of the compressed instructions changes.
11. The translation circuit of claim 10 , configured to breed the pairs of seed mix masks by being configured to: randomly select the crossover point in a pair of seed mix masks identified as parent A and parent B; and produce an offspring mix mask by concatenating a leftmost set of bits from before the crossover point from either parent A or B and a rightmost set of bits starting from after the crossover point from the parent not used to select the leftmost set of bits.
This invention relates to a translation circuit for generating mix masks used in cryptographic operations, particularly for improving the security and efficiency of data encryption and decryption processes. The problem addressed is the need for robust and diverse mix masks to enhance the security of cryptographic algorithms, such as those used in block ciphers or other data transformation systems. The translation circuit is configured to breed pairs of seed mix masks through a genetic algorithm-inspired process. The breeding process involves randomly selecting a crossover point within two parent mix masks, labeled as parent A and parent B. The circuit then generates an offspring mix mask by combining the leftmost bits from one parent (either A or B) up to the crossover point with the rightmost bits from the other parent starting from the crossover point onward. This method ensures that the offspring mix mask inherits characteristics from both parents, promoting diversity and complexity in the generated masks. The breeding process is designed to iteratively produce new mix masks, improving the overall security and unpredictability of the cryptographic system. The random selection of the crossover point and the combination of bits from different parents help prevent patterns that could be exploited by attackers, thereby enhancing the resistance of the cryptographic operations to analysis and brute-force attacks. The circuit's ability to generate diverse mix masks through this breeding mechanism contributes to the robustness of the cryptographic system.
12. The translation circuit of claim 10 , further configured to breed the pairs of seed mix masks based on a randomly selected crossover point in the pairs of seed mix masks.
This invention relates to a translation circuit designed for optimizing data processing, particularly in systems requiring efficient data transformation or translation. The core problem addressed is improving the performance and accuracy of data translation processes, which often involve complex transformations that can be computationally intensive and error-prone. The translation circuit includes a breeding mechanism for generating pairs of seed mix masks, which are used to enhance the translation process. These seed mix masks are derived from initial seed values and are optimized to improve the efficiency and accuracy of data translation. The breeding process involves combining or modifying these masks to produce new, potentially more effective versions. In this specific embodiment, the translation circuit is further configured to breed the pairs of seed mix masks using a randomly selected crossover point. This crossover point determines where the masks are split and recombined, allowing the circuit to explore different combinations of mask elements. By introducing randomness in the crossover process, the system can generate diverse and potentially more optimal mask pairs, improving the overall translation performance. This approach leverages evolutionary algorithms or genetic optimization techniques to iteratively refine the masks, ensuring that the translation process becomes more efficient over time. The random selection of crossover points helps avoid local optima and ensures a broader search space for optimal mask configurations.
13. The translation circuit of claim 10 , configured to mutate the offspring mix masks by being further configured to: randomly invert an individual bit in one of a pair of complementary offspring mix masks to determine a mutated offspring mix mask; and replace a seed mix mask in the seed population with the mutated offspring mix mask.
This invention relates to a translation circuit for optimizing mix masks in a genetic algorithm-based optimization process. The problem addressed is improving the efficiency and effectiveness of genetic algorithms by enhancing the mutation step, particularly for generating and replacing mix masks used in the optimization process. The translation circuit is configured to generate offspring mix masks from a seed population of mix masks. The offspring mix masks are derived from pairs of complementary mix masks in the seed population. To introduce diversity and avoid premature convergence, the circuit is further configured to mutate the offspring mix masks. The mutation process involves randomly inverting an individual bit in one of the complementary offspring mix masks, resulting in a mutated offspring mix mask. This mutated mask is then used to replace a seed mix mask in the seed population, ensuring continuous evolution of the population. The mutation step is critical for maintaining genetic diversity and preventing the algorithm from getting stuck in local optima. By randomly inverting a single bit, the circuit ensures controlled and incremental changes to the mix masks, balancing exploration and exploitation in the optimization process. This approach is particularly useful in applications requiring high-dimensional optimization, such as machine learning, signal processing, or circuit design, where mix masks are used to represent and manipulate data or configurations.
14. The translation circuit of claim 10 , wherein the program includes boot code, operating system code, and multiple application programs.
A translation circuit is disclosed for use in a computing system to facilitate the execution of software programs on a processor. The system addresses the challenge of efficiently translating and executing software instructions, particularly when the software is written in a high-level language that must be converted into machine-executable code. The translation circuit includes a memory storing a program with boot code, operating system code, and multiple application programs. The boot code initializes the system, the operating system manages hardware and software resources, and the application programs perform specific tasks. The translation circuit dynamically translates portions of the program into executable instructions for the processor, optimizing performance by caching frequently used translations and managing memory resources. The system ensures compatibility across different software environments by handling variations in instruction sets and memory addressing schemes. This approach improves execution efficiency and reduces the overhead associated with traditional translation methods, making it suitable for systems requiring fast and flexible software execution.
15. The translation circuit of claim 10 , further configured to determine a fitness level for each seed mix mask in the seed population using a current cost of translation hardware associated with each seed mix mask, wherein the fitness level of the seed mix mask represents a level of benefit for providing a high level of compression.
This invention relates to translation circuits used in data compression systems, specifically addressing the challenge of optimizing compression efficiency while managing hardware resource costs. The system generates a population of seed mix masks, each representing a potential configuration for data translation. A fitness evaluation process assesses each mask by calculating its associated hardware cost and determining how effectively it achieves high compression levels. The fitness level quantifies the trade-off between compression benefit and hardware resource utilization, guiding the selection of optimal configurations. This approach enables dynamic adaptation of translation strategies to balance performance and resource constraints in real-time data processing applications. The system may further include mechanisms to iteratively refine the seed population based on fitness evaluations, ensuring continuous improvement in compression efficiency. The invention is particularly useful in environments where hardware resources are limited, such as embedded systems or high-throughput data pipelines, where efficient compression is critical for performance and energy efficiency.
16. The translation circuit of claim 15 , wherein the current cost of translation hardware is based on an X-index and Y-index memory, an X pattern memory, and a Y pattern memory.
This invention relates to translation circuits used in data processing systems, particularly for optimizing hardware costs in translation operations. The problem addressed is the high cost of implementing translation hardware, which can be significant in systems requiring frequent data translations between different formats or domains. The invention provides a cost-efficient translation circuit that reduces hardware complexity by leveraging indexed memory structures and pattern memories. The translation circuit includes an X-index and Y-index memory, an X pattern memory, and a Y pattern memory. The X-index and Y-index memory stores mappings between input and output data indices, allowing efficient lookup of translation relationships. The X pattern memory stores predefined patterns or templates for input data, while the Y pattern memory stores corresponding output patterns. During operation, the circuit uses the X-index and Y-index memory to determine the appropriate translation path, then applies the stored patterns from the X and Y pattern memories to transform the input data into the desired output format. This approach minimizes the need for complex, dedicated translation logic, reducing hardware costs while maintaining translation accuracy. The invention is particularly useful in systems where data translation is frequent but the translation rules are predictable, such as in communication protocols, data encoding, or format conversion applications. By using indexed and pattern-based storage, the circuit achieves cost savings without sacrificing performance or flexibility.
17. The translation circuit of claim 15 , further configured to select an initial seed population of seed mix masks to include randomly selected mix masks and previously used mix masks which had a high fitness level for a previous program having instructions that are similar to the instructions used in the program.
This invention relates to a translation circuit for optimizing program execution by selecting and applying mix masks to instructions. The problem addressed is improving the efficiency of instruction translation in processing systems, particularly for programs with similar instruction patterns. The circuit is configured to select an initial seed population of mix masks, which are used to transform instructions into a more efficient format for execution. The seed population includes both randomly selected mix masks and previously used mix masks that demonstrated high fitness levels in prior programs with similar instruction sets. By leveraging historical performance data, the circuit aims to enhance translation accuracy and speed, reducing the computational overhead associated with instruction processing. The selection process ensures that the mix masks are tailored to the specific characteristics of the current program, improving overall system performance. This approach is particularly useful in systems where programs share common instruction patterns, allowing the circuit to build on past successes rather than starting from scratch each time. The invention focuses on optimizing the initial seed population to improve the efficiency of subsequent translation steps, ultimately enhancing the performance of the processing system.
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August 25, 2020
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