Legal claims defining the scope of protection. Each claim is shown in both the original legal language and a plain English translation.
1. A method of building an agnostic model of a physically-based semiconductor device for use in a first simulator, comprising: implementing, in the agnostic model, an arbitrary voltage source in series between a node voltage and a zero value voltage source; implementing, in the agnostic model, an equation of a physical property of the semiconductor device at the node voltage; implementing, in the agnostic model, a reference capacitor in series between the node voltage and a dummy voltage source; implementing, in the agnostic model, an arbitrary current source between a first node and a second node, wherein the arbitrary current source comprises the dummy voltage source divided by the reference capacitor, and wherein the arbitrary current source models the change in the physical property over time regardless of whether the simulator includes a source operator for the change in the physical property over time; and running the agnostic model in the first simulator.
Semiconductor device modeling. This invention addresses the challenge of creating a physically-based agnostic model of a semiconductor device that can be used in a simulator, particularly when the simulator may not inherently support modeling the change in physical properties over time. The method involves constructing an agnostic model that includes several components. An arbitrary voltage source is implemented in series between a node voltage and a zero voltage source. An equation representing a physical property of the semiconductor device at the node voltage is also implemented. A reference capacitor is placed in series between the node voltage and a dummy voltage source. Crucially, an arbitrary current source is implemented between a first and second node. This arbitrary current source is defined as the dummy voltage source divided by the reference capacitor. This configuration allows the arbitrary current source to accurately model the change in the physical property over time, even if the simulator lacks a dedicated source operator for such changes. Finally, the completed agnostic model is run within the first simulator.
2. The method of claim 1 , wherein the dummy voltage source comprises a zero value voltage source.
A system and method for electronic circuit testing involves generating a dummy voltage source to simulate or replace an actual voltage source in a circuit under test. The dummy voltage source is used to verify the functionality of the circuit without requiring the actual voltage source, reducing testing complexity and cost. In one implementation, the dummy voltage source is configured to output a zero value voltage, effectively simulating an open circuit or a disconnected voltage source. This allows for testing of circuit behavior under conditions where the voltage source is absent or non-functional. The system may include a controller that dynamically adjusts the dummy voltage source to different values, including zero, to evaluate various operational states of the circuit. The method ensures accurate testing by isolating the circuit from external voltage sources while maintaining controlled test conditions. This approach is particularly useful in automated testing environments where rapid and repeatable validation of circuit performance is required. The zero-value dummy voltage source simplifies the testing process by eliminating the need for physical voltage source disconnection or adjustment, improving efficiency and reliability in circuit validation.
3. The method of claim 1 , wherein implementing the arbitrary current source comprises a current monitored through the dummy voltage source.
A system and method for controlling an arbitrary current source in an electronic circuit, particularly for applications requiring precise current regulation. The invention addresses the challenge of accurately monitoring and adjusting current flow in circuits where traditional current sensing methods are impractical or insufficient. The solution involves integrating a dummy voltage source within the current source circuit to facilitate real-time current monitoring. By measuring the current through this dummy voltage source, the system can dynamically adjust the output current to maintain desired levels, compensating for variations in load conditions or component tolerances. This approach ensures stable and precise current delivery, which is critical in applications such as power management, sensor interfacing, and precision instrumentation. The dummy voltage source acts as a reference point, allowing the system to detect deviations from the target current and apply corrective measures. The method enhances reliability and accuracy in current regulation, overcoming limitations of conventional sensing techniques that rely on resistive shunts or Hall-effect sensors, which may introduce additional losses or require complex calibration. The invention is particularly useful in high-precision applications where minimal distortion and high fidelity in current control are essential.
4. The method of claim 1 , wherein the dummy voltage comprises a zero value.
This invention relates to electronic systems, specifically methods for managing voltage signals in circuits to improve performance or reduce power consumption. The problem addressed involves the need to handle dummy voltage signals, which are often used as placeholders or reference values in electronic circuits. These dummy voltages can introduce inefficiencies or inaccuracies if not properly managed. The invention describes a method where a dummy voltage is set to a zero value. This approach simplifies circuit design by eliminating the need for additional voltage generation or regulation components. By using a zero-value dummy voltage, the system avoids unnecessary power consumption and potential signal interference. This method is particularly useful in digital circuits, analog-to-digital converters, or sensor interfaces where precise voltage control is critical. The method may be applied in various electronic devices, including microcontrollers, signal processors, or power management units. Setting the dummy voltage to zero ensures compatibility with low-power modes and reduces the risk of voltage-related errors. The invention may also include additional steps, such as initializing the circuit, configuring voltage levels, or monitoring signal integrity, to ensure reliable operation. Overall, this technique provides a straightforward solution for managing dummy voltages in electronic systems, enhancing efficiency and reliability.
5. The method of claim 1 , comprising running the agnostic model as part of a circuit in the first simulator.
This invention relates to electronic circuit simulation, specifically improving the accuracy and efficiency of simulating circuits with agnostic models. The problem addressed is the challenge of accurately simulating circuits that include models with unknown or partially defined parameters, which can lead to unreliable results in traditional simulation approaches. The solution involves integrating an agnostic model—a model that can adapt to varying parameters or incomplete specifications—into a circuit simulation process. The agnostic model is executed within a first simulator, which processes the circuit design and evaluates the behavior of the circuit under different conditions. This approach allows for more flexible and accurate simulations, particularly when dealing with components or systems where full parameter details are not available. The method ensures that the agnostic model operates as part of the overall circuit simulation, providing a unified and consistent analysis. By incorporating the agnostic model directly into the simulation workflow, the invention enhances the reliability of circuit simulations, especially in early design stages or when working with emerging technologies where complete model specifications may not yet be finalized. The technique is particularly useful in fields like semiconductor design, where rapid prototyping and iterative testing are critical. The invention improves upon prior art by dynamically adapting to incomplete or evolving model parameters, reducing the need for manual adjustments and improving simulation accuracy.
6. The method of claim 5 , comprising running the agnostic model in a second simulator comprising a different syntax from the first simulator.
The invention relates to a method for testing software models in multiple simulation environments. The problem addressed is the difficulty of validating software models across different simulation tools, which often use distinct syntaxes and configurations. The method involves using an agnostic model that can be executed in multiple simulators with varying syntaxes. The agnostic model is first run in a first simulator, which may have a specific syntax or configuration. The same agnostic model is then executed in a second simulator that has a different syntax or configuration from the first. This approach ensures that the model behaves consistently across different simulation environments, improving reliability and reducing errors caused by syntax-specific dependencies. The method may also include additional steps such as validating the model's output in each simulator or adjusting the model to ensure compatibility with the different syntaxes. By supporting multiple simulators, the method enhances the flexibility and robustness of software model testing.
7. The method of claim 5 , wherein the first simulator comprises a SPICE simulator.
A method for electronic circuit simulation involves using a SPICE simulator as the first simulator in a multi-simulator system. The SPICE simulator is a widely used tool for analyzing analog and mixed-signal circuits, providing detailed transistor-level modeling and accurate simulation of electrical behavior. This method integrates the SPICE simulator with other simulation tools to enhance the accuracy and efficiency of circuit analysis. The SPICE simulator is configured to perform initial simulations, capturing detailed electrical characteristics such as voltage, current, and timing behavior. The results from the SPICE simulator are then used in conjunction with other simulators to refine the analysis, optimize performance, and validate circuit designs. This approach leverages the strengths of SPICE for precise modeling while combining it with additional simulation techniques to address broader design requirements. The method is particularly useful in integrated circuit design, where accurate simulation of analog and digital components is critical for ensuring functionality and reliability. By incorporating SPICE as the primary simulator, the method ensures high-fidelity modeling of circuit behavior, reducing the need for physical prototyping and accelerating the design process.
8. The method of claim 5 , comprising fabricating the circuit.
A method for fabricating an integrated circuit involves forming a semiconductor substrate with a plurality of active regions and a plurality of isolation regions. The active regions are defined by the isolation regions, which are formed using a shallow trench isolation (STI) process. The method includes depositing a dielectric layer over the substrate and patterning the dielectric layer to form openings that expose portions of the substrate. A conductive material is then deposited into the openings to form conductive contacts that electrically connect to the active regions. The conductive material may include a metal or a doped semiconductor material. The method further includes forming a plurality of conductive interconnects over the dielectric layer, where the interconnects are electrically connected to the conductive contacts. The interconnects may be formed using a damascene or dual damascene process, where a conductive material is deposited into trenches or vias etched into the dielectric layer. The method may also include forming additional dielectric layers and conductive layers to create a multi-layer interconnect structure. The resulting integrated circuit includes the active regions, the isolation regions, the conductive contacts, and the conductive interconnects, providing electrical connectivity between different components of the circuit. This method addresses the need for efficient and reliable fabrication of integrated circuits with high-density interconnect structures.
9. The method of claim 1 , comprising implementing the agnostic model in a comprehensive circuit.
A system and method for implementing an agnostic model within a comprehensive circuit to enhance computational efficiency and adaptability. The agnostic model is designed to process diverse types of input data without requiring task-specific modifications, enabling seamless integration across various applications. The comprehensive circuit includes hardware components optimized for executing the agnostic model, such as specialized processors, memory units, and interconnects, ensuring low-latency and high-throughput performance. The system further incorporates adaptive learning mechanisms that allow the model to dynamically adjust its parameters based on real-time data inputs, improving accuracy and reducing the need for manual intervention. Additionally, the circuit may include error detection and correction modules to maintain reliability during operation. The method involves deploying the agnostic model within the circuit, configuring the hardware components to support the model's operations, and continuously monitoring performance to optimize resource utilization. This approach eliminates the need for multiple specialized models, reducing computational overhead and enhancing scalability. The system is particularly useful in applications requiring real-time processing, such as autonomous systems, edge computing, and adaptive control systems.
10. The method of claim 1 , wherein the node voltage comprises an equation representing a charge at a physical location within the semiconductor device.
This technical summary describes a method for analyzing semiconductor devices by modeling node voltages as equations representing charge at specific physical locations within the device. The approach improves accuracy in semiconductor simulations by directly linking voltage behavior to charge distribution, addressing limitations in traditional methods that rely on simplified or indirect representations. The method involves calculating node voltages using equations that account for charge accumulation or depletion at precise points in the semiconductor structure. This allows for more precise modeling of electrical behavior, particularly in advanced semiconductor technologies where charge distribution significantly impacts performance. By incorporating physical charge location data, the method enhances simulation accuracy for parameters such as leakage current, threshold voltage, and switching behavior. The technique is applicable to various semiconductor devices, including transistors, diodes, and memory cells, where charge dynamics play a critical role. It can be integrated into existing semiconductor design and verification workflows to improve reliability and performance predictions. The method is particularly useful for nanoscale devices where traditional voltage modeling approaches may fail to capture critical charge-related effects. This approach solves the problem of inaccurate voltage modeling in semiconductor simulations by providing a more physically grounded representation of charge behavior. It enables better optimization of device designs and reduces the need for costly iterative testing. The method can be implemented in simulation software or hardware emulation tools to support semiconductor development and manufacturing.
11. A method of providing an agnostic model for a time based derivative of a property of a semiconductor device for use in a first simulator, comprising: implementing an equation of the property at a node voltage into an arbitrary voltage source, wherein the node voltage is connected to a reference capacitor; implementing a current through the reference capacitor as I Crefd = C refd dV ref dt wherein C refd with capacitance value myC ref represents the reference capacitor and V ref represents the voltage across C refd ; implementing a value into an arbitrary current source as I ref = I ( V dummy ) myC ref where V dummy is a dummy voltage connected in series to the reference capacitor, wherein the arbitrary current source models a change in the property over time regardless of whether the simulator includes a source operator for the change in the property over time; and running the agnostic model in a first simulator.
This invention relates to semiconductor device modeling, specifically providing an agnostic model for simulating time-based derivatives of semiconductor properties in different simulators. The problem addressed is the lack of a universal approach to model dynamic properties of semiconductor devices across various simulation tools, which often require specific source operators that may not be available in all simulators. The method involves creating a simulator-agnostic model by implementing an equation for a semiconductor property at a node voltage into an arbitrary voltage source. This voltage source is connected to a reference capacitor, which has a capacitance value represented by C_ref. The current through this reference capacitor is modeled as I_Crefd = C_ref * dV_ref/dt, where V_ref is the voltage across the capacitor. Additionally, a dummy voltage (V_dummy) is connected in series with the reference capacitor, and an arbitrary current source is implemented with a value of I_ref = I(V_dummy) * C_ref. This current source models the change in the property over time, ensuring compatibility with simulators that lack a dedicated source operator for time-based property derivatives. The model is then executed in a first simulator, demonstrating its versatility across different simulation environments. This approach enables accurate dynamic property modeling without relying on simulator-specific operators, improving compatibility and usability.
12. The method of claim 11 , wherein the arbitrary current source is placed between a first node and a second node within a subcircuit of the agnostic model.
This invention relates to electronic circuit modeling, specifically methods for integrating arbitrary current sources into subcircuits within an agnostic circuit model. The technology addresses the challenge of accurately representing and analyzing complex circuits by enabling precise placement of current sources within specific subcircuits, ensuring proper circuit behavior simulation. The method involves inserting an arbitrary current source between two nodes within a subcircuit of the agnostic model. The agnostic model is a general framework that allows for the representation of various circuit components and their interconnections without prior knowledge of their specific configurations. By placing the current source between a first node and a second node, the method ensures that the current source's behavior is accurately reflected in the subcircuit's operation. This placement allows for detailed analysis of how the current source interacts with other components within the subcircuit, enabling more accurate simulations and optimizations. The method is particularly useful in scenarios where precise current injection or extraction is required within a specific part of a circuit, such as in power distribution networks, signal processing circuits, or mixed-signal designs. By integrating the current source in this manner, engineers can better understand and predict the circuit's performance under various conditions. The approach enhances the flexibility and accuracy of circuit modeling, facilitating improved design and verification processes.
13. The method of claim 11 , comprising running the agnostic model value in a second simulator comprising a different syntax from the first simulator.
This invention relates to a method for validating models in simulation environments, particularly where models are used across different simulators with varying syntaxes. The problem addressed is ensuring consistent model behavior when deployed in multiple simulation tools, which often have incompatible syntaxes or execution environments. The method involves generating an agnostic model value from a first simulator, which is designed to be independent of the simulator's specific syntax or implementation details. This agnostic model value is then executed in a second simulator that has a different syntax or operational framework than the first. The second simulator processes the agnostic model value to verify its behavior, ensuring that the model functions correctly across different simulation platforms. This approach allows for cross-platform validation, reducing errors and inconsistencies that arise from syntax differences or simulator-specific implementations. The method supports interoperability between simulation tools, enabling seamless model reuse and validation in diverse simulation environments. The invention is particularly useful in fields like aerospace, automotive, or electronics, where models must be tested across multiple simulation tools to ensure reliability and accuracy.
14. The method of claim 11 , wherein the property of the semiconductor device comprises an equation representing a charge at a physical location within the semiconductor device.
This invention relates to semiconductor device modeling and simulation, specifically addressing the challenge of accurately representing and analyzing physical properties of semiconductor devices during design and optimization. The method involves simulating semiconductor device behavior by evaluating a property of the device, such as charge distribution, at specific physical locations within the device. The property is represented mathematically as an equation that describes the charge at a given point, enabling precise modeling of electrical characteristics. This approach allows for detailed analysis of device performance, including current flow, voltage distribution, and other critical parameters. The method may be applied to various semiconductor structures, such as transistors, diodes, or integrated circuits, to improve design accuracy and predict device behavior under different operating conditions. By incorporating this equation-based representation, the simulation provides a more refined understanding of how charge dynamics influence device functionality, supporting advancements in semiconductor technology and electronic device development.
15. A non-transitory computer-readable medium that stores therein a program causing a processor to execute a process, comprising: implementing, in an agnostic model for use in a first simulator, an arbitrary voltage source in series between a node voltage and a zero value voltage source; implementing, in the agnostic model, a reference capacitor in series between the node voltage and a dummy voltage source; implementing, in the agnostic model, an arbitrary current source between a first node and a second node, wherein the arbitrary current source comprises the dummy voltage source divided by the reference capacitor, and wherein the arbitrary current source models a change in charge over time within the semiconductor device regardless of whether the simulator includes a source operator for the change in charge over time; and running the agnostic model in a first simulator.
This invention relates to semiconductor device simulation, specifically addressing the challenge of accurately modeling dynamic charge behavior in simulators that lack built-in source operators for charge-time relationships. The solution involves an agnostic modeling approach that works across different simulation tools without requiring native support for charge dynamics. The method implements an arbitrary voltage source in series between a node voltage and a zero-value voltage source, effectively decoupling the node's electrical behavior from ground. A reference capacitor is then placed in series between the node voltage and a dummy voltage source, creating a controlled impedance path. An arbitrary current source is introduced between two nodes, where the current value is derived from the dummy voltage divided by the reference capacitor. This current source dynamically models charge accumulation or depletion over time, compensating for simulators that cannot directly compute charge-time derivatives. The agnostic model ensures compatibility with various simulators by abstracting the charge dynamics into voltage and current relationships, allowing accurate transient analysis without relying on simulator-specific operators. The approach enables precise simulation of semiconductor devices where charge behavior significantly impacts performance, such as in memory cells or high-speed circuits.
16. The non-transitory computer-readable medium of claim 15 , wherein the process further comprises running the agnostic model in a second simulator comprising a different syntax from the first simulator.
This invention relates to a system for simulating and validating models in different simulation environments. The problem addressed is the difficulty of reusing simulation models across different simulators due to variations in syntax and compatibility issues. The solution involves a non-transitory computer-readable medium storing instructions for executing a process that includes running an agnostic model in a first simulator and then running the same agnostic model in a second simulator with a different syntax. The agnostic model is designed to be compatible with multiple simulators, allowing seamless execution without modification. The process ensures that the model behaves consistently across different simulation environments, improving efficiency and reducing errors in model validation. The system may also include generating a simulation output from the agnostic model in the first simulator and comparing it with a simulation output from the second simulator to verify consistency. This approach enables users to test models in diverse simulation frameworks without the need for manual adjustments, enhancing flexibility and reliability in simulation workflows.
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August 25, 2020
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