Legal claims defining the scope of protection. Each claim is shown in both the original legal language and a plain English translation.
1. A memory system comprising: a plurality of nonvolatile memory devices each including a plurality of memory blocks; and a controller configured to configure at least one memory block selected from the plurality of memory blocks as a super block, and to perform a read reclaim operation for the super block based on memory-block-read-counts of the super block, wherein the controller divides the super block into a plurality of page groups, decides an adjusting number based on a change in the memory-block-read-counts from a first time point to a second time point, decides a first number by considering the adjusting number and a reference number, selects a page group having the first number from the plurality of page groups, and performs the read reclaim operation for the page group having the first number after the second time point.
The memory system is designed to improve data management in nonvolatile memory devices, particularly addressing wear leveling and performance optimization. The system includes multiple nonvolatile memory devices, each containing multiple memory blocks. A controller manages these devices by configuring at least one memory block as a super block, which is a logical grouping of physical blocks for efficient data handling. The controller performs read reclaim operations on the super block based on read counts associated with its constituent memory blocks. To optimize the read reclaim process, the controller divides the super block into multiple page groups. It calculates an adjusting number based on changes in memory-block-read-counts between two time points, then determines a first number by combining the adjusting number with a predefined reference number. The controller selects a page group corresponding to this first number and performs the read reclaim operation on that group after the second time point. This approach ensures that read reclaim operations are distributed more evenly across the super block, reducing wear and improving longevity. The system dynamically adjusts the selection of page groups based on read activity, enhancing overall system performance and reliability.
2. The memory system according to claim 1 , wherein, in the plurality of nonvolatile memory devices, each of the plurality of memory blocks includes a plurality of pages, and the controller divides the super block into the plurality of page groups including at least one page of a plurality of pages of the selected at least one memory block.
A memory system includes a controller and multiple nonvolatile memory devices, each containing memory blocks. Each memory block is divided into multiple pages. The controller manages a super block formed by selecting at least one memory block from each nonvolatile memory device. The super block is further divided into multiple page groups, where each page group includes at least one page from the pages of the selected memory blocks. This division allows for efficient data management and wear leveling across the memory devices. The controller controls data storage and retrieval operations within these page groups to optimize performance and endurance. The system ensures balanced usage of memory blocks by distributing data across different page groups, reducing wear on any single block. This approach improves the overall reliability and lifespan of the memory system by evenly distributing write and erase cycles. The controller dynamically adjusts the page group assignments based on usage patterns to maintain optimal performance. The system is particularly useful in solid-state storage devices where wear leveling and efficient data management are critical for long-term reliability.
3. The memory system according to claim 1 , wherein the controller decides the adjusting number based on a difference value between a first maximum memory-block-read-count having a maximum value at the first time point and a second maximum memory-block-read-count having a maximum value at the second time point, among the memory-block-read-counts of the super block.
A memory system includes a controller that manages data storage and retrieval across multiple memory blocks organized into super blocks. The system addresses the challenge of optimizing read operations in non-volatile memory, particularly in solid-state drives (SSDs), where frequent read operations can degrade performance and lifespan. The controller monitors read counts for individual memory blocks within a super block and adjusts the number of blocks involved in read operations based on changes in read activity. Specifically, the controller compares the highest read count at a first time point with the highest read count at a second time point. If the difference between these values exceeds a threshold, the controller modifies the number of blocks participating in subsequent read operations to balance wear and improve efficiency. This dynamic adjustment helps mitigate performance degradation and extends the memory system's lifespan by distributing read operations more evenly across blocks. The system is particularly useful in high-performance storage applications where read-intensive workloads are common.
4. The memory system according to claim 3 , wherein the controller decides the adjusting number by comparing the difference value and at least one critical reference with each other.
A memory system includes a controller that adjusts a parameter of the system based on a difference value derived from a comparison between a first value and a second value. The first value is obtained from a first memory cell, and the second value is obtained from a second memory cell. The controller determines an adjusting number by comparing the difference value with at least one critical reference value. The adjusting number is used to modify the parameter, which may include a read voltage, a program voltage, or an erase voltage. The system may also include a memory array with multiple memory cells, where the first and second memory cells are part of this array. The controller may further adjust the parameter based on additional factors, such as environmental conditions or wear levels of the memory cells. The goal is to improve the reliability and performance of the memory system by dynamically adjusting operational parameters in response to variations in cell characteristics.
5. An electronic device comprising: a controller; and a non-transitory machine-readable storage medium that includes a plurality of memory blocks and stores coded instructions executable by the controller, wherein the instructions includes instructions that substantially manage at least one memory block selected from the memory blocks as a super block, divide the super block into a plurality of page groups, decide a number of target page groups, for which a read reclaim for the super block is to be performed, based on memory-block-read-counts of the super block, and control a read reclaim operation to be performed for page groups having the decided number, and wherein the instruction that decides the number of target page groups includes an instruction that decides an adjusting number based on a change in the memory-block-read-counts from a first time point to a second time point and decides the number of target page groups by considering the adjusting number and a reference number.
This invention relates to memory management in electronic devices, specifically improving the efficiency of read reclaim operations in non-volatile memory systems. The problem addressed is the degradation of memory performance due to frequent read reclaim operations, which are necessary to maintain data integrity but can consume significant resources. The solution involves dynamically adjusting the scope of read reclaim operations based on memory usage patterns to optimize performance and longevity. The electronic device includes a controller and a non-transitory storage medium with multiple memory blocks. The storage medium stores instructions that manage at least one memory block as a super block, dividing it into multiple page groups. The system determines the number of target page groups for read reclaim operations based on the read counts of the super block. The decision process involves calculating an adjusting number derived from changes in read counts over time and combining this with a reference number to determine the final number of target page groups. This adaptive approach ensures that read reclaim operations are performed only when necessary, reducing unnecessary overhead while maintaining data reliability. The method dynamically balances performance and endurance by adjusting the reclaim scope in response to memory access patterns.
6. The electronic device according to claim 5 , wherein each of the plurality of memory blocks includes a plurality of pages and each of the plurality of page groups includes at least one page in the selected at least one memory block.
This invention relates to memory management in electronic devices, specifically addressing the challenge of efficiently organizing and accessing data in non-volatile memory systems, such as flash memory. The invention improves data storage and retrieval by structuring memory into blocks and pages, with pages grouped for optimized operations. The system includes a memory controller that manages a plurality of memory blocks, each containing multiple pages. The controller selects at least one memory block for data operations, such as read, write, or erase. Within the selected block, the controller further organizes pages into page groups, where each group contains at least one page. This grouping allows for more granular control over data operations, enabling efficient handling of partial block updates or selective data access without affecting entire blocks. The memory controller may perform operations on these page groups, such as reading or writing data to specific pages within a group, while leaving other pages in the same block unaffected. This approach reduces unnecessary data movement and wear on the memory, extending the lifespan of the storage device. The system may also include error correction mechanisms to ensure data integrity during these operations. By dynamically managing page groups within selected memory blocks, the invention enhances performance, reliability, and endurance in memory storage systems, particularly in applications requiring frequent updates or partial data access.
7. The electronic device according to claim 5 , wherein the instruction that controls the read reclaim operation to be performed controls a read reclaim operation for a target page group corresponding to the decided number of target page groups to be performed after the second time point.
The invention relates to electronic devices with memory management systems, specifically addressing the problem of efficiently performing read reclaim operations in non-volatile memory to maintain data integrity and performance. Read reclaim operations are necessary to recover data from memory cells that may degrade over time, but performing these operations too frequently can reduce system performance, while performing them too infrequently can lead to data loss. The invention provides a method to optimize the timing and scope of read reclaim operations based on system conditions. The electronic device includes a memory controller that monitors memory usage and performance metrics. When a read reclaim operation is triggered, the controller determines a number of target page groups to be processed based on current system conditions, such as memory wear level, error rates, or available system resources. The controller then schedules the read reclaim operation to occur after a second time point, which is a predefined or dynamically determined delay period following the initial detection of the need for reclaim. This delay allows the system to prioritize other operations before performing the reclaim, reducing performance impact. The reclaim operation is then executed for the decided number of target page groups, ensuring efficient data recovery without excessive overhead. The invention improves memory reliability and system performance by dynamically adjusting reclaim operations based on real-time conditions.
8. The electronic device according to claim 5 , wherein the instruction that decides the adjusting number decides the adjusting number based on a difference value between a first maximum memory-block-read-count having a maximum value at the first time point and a second maximum memory-block-read-count having a maximum value at the second time point, among the memory-block-read-counts of the super block.
The invention relates to memory management in electronic devices, specifically optimizing read operations in non-volatile memory systems. The problem addressed is inefficient memory access due to uneven wear and performance degradation in memory blocks, particularly in flash memory or similar storage technologies. The invention provides a method to dynamically adjust the number of memory blocks read during a read operation based on changes in memory access patterns over time. The system monitors memory-block-read-counts, which track how frequently each memory block is accessed. A super block, comprising multiple memory blocks, is analyzed at two different time points. The maximum memory-block-read-count at the first time point (first maximum) and the maximum memory-block-read-count at the second time point (second maximum) are compared. The difference between these values determines an adjusting number, which is used to modify the number of memory blocks read during subsequent operations. This adjustment helps balance read operations across blocks, reducing wear and improving performance by distributing access more evenly. The method ensures that frequently accessed blocks do not degrade faster than others, extending the lifespan of the memory system. The invention is particularly useful in devices requiring reliable long-term storage, such as solid-state drives or embedded systems.
9. The electronic device according to claim 8 , wherein the instruction that decides the adjusting number decides the adjusting number based on comparison between the difference value and at least one critical reference.
This invention relates to electronic devices with adaptive adjustment mechanisms, particularly for optimizing performance based on operational conditions. The problem addressed is the need for dynamic adjustment of device parameters to maintain efficiency, reliability, or performance under varying conditions, such as temperature, load, or environmental factors. The electronic device includes a monitoring unit that measures a parameter, such as temperature or voltage, and calculates a difference value representing the deviation from a target or reference value. An adjustment unit then determines an adjusting number, which is a quantitative value used to modify device operations. This adjusting number is decided based on a comparison between the difference value and at least one critical reference, which could be a predefined threshold, a range, or a dynamic benchmark. The comparison helps determine the magnitude or direction of the adjustment needed to correct or optimize the parameter. The adjustment unit applies the adjusting number to modify device operations, such as adjusting power consumption, cooling mechanisms, or processing speed. The critical reference may be a single threshold or multiple thresholds, allowing for graduated adjustments. For example, if the difference value exceeds a high threshold, the adjustment may be more aggressive, while a smaller deviation may trigger a minor adjustment. This adaptive approach ensures the device operates efficiently and reliably under varying conditions.
10. The electronic device according to claim 8 , wherein the instruction that decides the adjusting number decides the adjusting number as a positive number when the difference value is greater than or equal to a critical reference.
This invention relates to electronic devices with adaptive display adjustment mechanisms. The problem addressed is optimizing display settings based on environmental or usage conditions to improve user experience. The device includes a display, a sensor system, and a processor. The sensor system detects environmental or usage parameters, such as ambient light or user interaction patterns, and generates a difference value representing a deviation from an ideal or baseline condition. The processor adjusts display settings, such as brightness or contrast, by determining an adjusting number based on this difference value. If the difference value exceeds a predefined critical reference, the adjusting number is set as a positive value, indicating an increase in the display adjustment. The processor then applies this adjustment to the display settings. The sensor system may include multiple sensors, and the processor may use historical data or machine learning to refine the adjustment logic. The goal is to dynamically optimize display performance without manual user intervention, enhancing usability in varying conditions.
11. The electronic device according to claim 8 , wherein the instruction that decides the adjusting number decides the adjusting number as a negative number when the difference value is less than a critical reference.
The invention relates to electronic devices with adaptive display brightness control. The problem addressed is optimizing display brightness to reduce power consumption while maintaining visibility under varying ambient light conditions. The device includes a light sensor to measure ambient light levels and a processor that adjusts display brightness based on the sensor data. The adjustment is determined by a difference value between the measured ambient light and a target brightness level. If this difference is below a critical reference threshold, the processor reduces the display brightness by a negative adjustment number. This ensures the display dims appropriately in low-light environments, conserving energy without compromising user experience. The device may also include a memory storing instructions for the processor to execute these adjustments, and a display module that implements the brightness changes. The system dynamically adapts to environmental changes, preventing excessive power drain while maintaining readability. The critical reference threshold acts as a safety limit to avoid overly dim displays in moderately lit conditions. This approach improves battery life in portable devices like smartphones and tablets by intelligently balancing brightness and power efficiency.
12. A memory system comprising: a storage including a super block including a plurality of page groups each including at least a single page from one of a plurality of memory blocks forming the super block; and a controller configured to: detect maximum memory-block-read-counts of the super block at predetermined time points; obtain a variance of the maximum memory-block-read-counts between immediately previous and current ones among the predetermined time points; select a target number of target page groups among the plurality of page groups; and control the storage to perform a read reclaim operation to the target number of target page groups, wherein the target number is sum of a reference number and an adjusting number decided based on the variance.
This invention relates to memory systems, specifically addressing wear leveling and data management in non-volatile memory storage. The problem solved is optimizing read reclaim operations to balance performance and endurance by dynamically adjusting the number of page groups processed based on read activity variance. The memory system includes a storage with a super block composed of multiple memory blocks, each divided into page groups containing at least one page. A controller monitors the maximum read counts of memory blocks within the super block at set intervals, calculating the variance between consecutive measurements. Based on this variance, the controller determines an adjusting number added to a reference number to set the target number of page groups for read reclaim operations. This adaptive approach ensures efficient data migration, reducing wear by dynamically scaling reclaim operations according to actual usage patterns. The system avoids excessive reclaim operations during low-activity periods while intensifying them during high-activity phases, extending the memory's lifespan. The controller's logic ensures optimal performance by balancing read reclaim frequency with system workload fluctuations.
13. The memory system according to claim 12 , wherein adjusting number increases when the variance falls in a first range and decreases when the variance falls in a second range.
A memory system is designed to optimize data storage and retrieval by dynamically adjusting a parameter based on variance in performance metrics. The system monitors variance in memory access times, error rates, or other operational metrics to determine whether the system is operating within an optimal range. When the variance falls within a first predefined range, indicating stable or improved performance, the system increases a configurable parameter, such as a threshold value, buffer size, or retry count, to enhance efficiency. Conversely, if the variance falls within a second predefined range, suggesting degraded performance or instability, the system decreases the same parameter to mitigate issues. This adaptive adjustment ensures the memory system maintains optimal performance under varying conditions, such as changes in workload, temperature, or component aging. The system may also include mechanisms to track historical variance data, allowing for predictive adjustments before performance degradation occurs. By dynamically tuning parameters in response to real-time variance analysis, the memory system achieves higher reliability and efficiency compared to static configurations.
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November 3, 2020
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