Legal claims defining the scope of protection. Each claim is shown in both the original legal language and a plain English translation.
1. A display device comprising: a pixel unit including first pixels in a first pixel region, second pixels in a second pixel region, and third pixels in a third pixel region; a first scan driver configured to drive first scan lines coupled to the first pixels; a second scan driver configured to drive second scan lines coupled to the second pixels; and a third scan driver configured to drive third scan lines coupled to the third pixels, wherein the first scan driver, the second scan driver, and the third scan driver differently set a supply order of a scan signal supplied to the first scan lines, the second scan lines, and the third scan lines, corresponding to a first mode and a second mode different from the first mode, wherein the first scan driver, the second scan driver, and the third scan driver are configured to sequentially supply the scan signal to the first pixel region, the second pixel region, and the third pixel region in the first mode, and the first scan driver, the second scan driver, and the third scan driver are configured such that, in the second mode, the second scan driver supplies the scan signal to the second pixel region and then the first and third scan drivers supply the scan signal to the first pixel region and the third pixel region.
2. The display device of claim 1 , wherein the display device is set to the second mode when the display device is mounted in a wearable device, and is set to the first mode otherwise.
A display device is configured to operate in two distinct modes to optimize power consumption and performance based on its usage context. The first mode is a high-performance mode, where the display device operates at full capacity, providing maximum brightness, resolution, and refresh rate. The second mode is a power-saving mode, where the display device reduces its operational parameters, such as brightness, resolution, or refresh rate, to conserve energy. The transition between these modes is automatically triggered by the device's mounting status. When the display device is integrated into a wearable device, such as a smartwatch or augmented reality glasses, it defaults to the second, power-saving mode to extend battery life. In all other contexts, such as standalone use or integration into non-wearable electronics, the display device operates in the first, high-performance mode. This adaptive switching ensures optimal performance when needed while prioritizing energy efficiency in wearable applications, addressing the challenge of balancing power consumption and display quality in portable and wearable electronics.
3. The display device of claim 1 , further comprising a timing controller configured to supply a first start signal to the first scan driver, supply a second start signal to the second scan driver, and supply a third start signal to the third scan driver.
This invention relates to display devices, specifically those with multiple scan drivers for driving display panels. The problem addressed is the need for precise control of scan signals in displays with multiple scan drivers to ensure synchronized and efficient operation. The display device includes a display panel with a plurality of pixels, a first scan driver, a second scan driver, and a third scan driver. Each scan driver is configured to generate scan signals for driving the display panel. The first scan driver is connected to a first group of scan lines, the second scan driver to a second group, and the third scan driver to a third group. The display device also includes a timing controller that supplies distinct start signals to each scan driver. The first start signal is provided to the first scan driver, the second start signal to the second scan driver, and the third start signal to the third scan driver. This configuration allows independent control of each scan driver, enabling flexible and optimized timing for different regions of the display panel. The timing controller ensures that the scan signals are generated in a coordinated manner, improving display performance and reducing power consumption. The invention is particularly useful in large-area or high-resolution displays where precise timing control is critical.
4. The display device of claim 3 , wherein, when the display device is driven in the first mode, the first scan driver, the second scan driver, and the third scan driver are configured to sequentially supply the scan signal to the first scan lines, the second scan lines, and the third scan lines.
A display device includes multiple scan drivers and scan lines to control pixel activation in a display panel. The device operates in at least two modes: a first mode for normal display operation and a second mode for reduced power consumption or other specialized functions. The display panel has a plurality of pixels arranged in rows and columns, with the rows divided into first, second, and third scan lines. The first scan driver is connected to the first scan lines, the second scan driver is connected to the second scan lines, and the third scan driver is connected to the third scan lines. In the first mode, the scan drivers sequentially supply a scan signal to the first, second, and third scan lines, enabling the display to update pixel data row by row. The sequential activation ensures proper timing for data signals to be written to each pixel. The second mode may involve different scan signal patterns or reduced scan line activation to optimize power efficiency or achieve other operational goals. The display device may also include a data driver to provide data signals to the pixels and a timing controller to manage the operation of the scan and data drivers. This configuration allows flexible control over display operation, supporting both high-performance and low-power modes.
5. The display device of claim 3 , wherein, when the display device is driven in the first mode, the timing controller is configured to sequentially supply the first start signal, the second start signal, and the third start signal.
A display device includes a timing controller and a display panel with multiple sub-pixels arranged in a matrix. The display panel has a first mode for high-resolution display and a second mode for low-resolution display. In the first mode, the timing controller sequentially supplies three distinct start signals to control the activation of sub-pixels in different groups. The first start signal activates a first group of sub-pixels, the second start signal activates a second group, and the third start signal activates a third group. This sequential activation reduces power consumption by preventing simultaneous charging of all sub-pixels, while maintaining high-resolution output. The display panel may include red, green, and blue sub-pixels, and the timing controller adjusts the timing of the start signals to optimize display performance. The device may also include a data driver to supply data signals to the sub-pixels based on the start signals. This approach improves energy efficiency in high-resolution displays by staggering the activation of sub-pixel groups.
6. The display device of claim 5 , wherein the first start signal, the second start signal, and the third start signal are set to have the same width.
A display device includes a timing controller and a data driver. The timing controller generates a first start signal, a second start signal, and a third start signal, each controlling different operations within the display. The first start signal initiates a data output operation in the data driver, the second start signal triggers a data latch operation, and the third start signal activates a data shift operation. These signals are synchronized to ensure proper timing for data processing and display updates. The first, second, and third start signals are configured to have identical pulse widths, ensuring consistent timing margins and reducing signal skew. This design improves synchronization between the timing controller and the data driver, enhancing display performance and reducing errors in data transmission. The identical pulse widths simplify signal generation and reduce complexity in the timing control logic. The display device may be used in various applications, including LCD, OLED, or other types of flat-panel displays where precise timing control is critical.
7. The display device of claim 3 , wherein, when the display device is driven in the second mode, the second scan driver is configured to sequentially supply a scan signal to the second scan lines, and the first scan driver and the third scan driver are configured to sequentially supply a scan signal to the first scan lines and the third scan lines at the same time.
This invention relates to display devices, specifically those with multiple scan drivers for controlling scan lines in a display panel. The problem addressed is improving display performance by optimizing scan signal distribution to reduce power consumption and enhance display quality. The display device includes a display panel with first, second, and third scan lines, and first, second, and third scan drivers connected to these scan lines. The device operates in at least two modes. In a first mode, the scan drivers independently control their respective scan lines. In a second mode, the second scan driver sequentially supplies a scan signal to the second scan lines, while the first and third scan drivers simultaneously supply scan signals to the first and third scan lines. This synchronized operation reduces the time required to scan the display, improving refresh rates and power efficiency. The scan drivers may be integrated circuits or separate components, and the scan lines may be arranged in a staggered or interleaved pattern to optimize signal distribution. The invention is particularly useful in high-resolution or large-area displays where efficient scan signal management is critical.
8. The display device of claim 7 , wherein the scan signal supplied to the first scan lines and the third scan lines is set to have a width narrower than that of the scan signal supplied to the second scan lines.
This invention relates to display devices, specifically addressing the issue of improving display performance by optimizing scan signal timing in a display panel with multiple scan lines. The display device includes a display panel with a plurality of scan lines divided into at least three groups: first scan lines, second scan lines, and third scan lines. The scan signal supplied to the first and third scan lines is configured to have a narrower pulse width compared to the scan signal supplied to the second scan lines. This differential timing adjustment helps reduce power consumption and improve display uniformity by balancing the charging and discharging times across different scan lines. The display panel may also include data lines intersecting the scan lines, with pixel circuits formed at the intersections to control pixel elements. The scan driver circuit generates the scan signals with the specified pulse widths, ensuring proper timing for each scan line group. This approach is particularly useful in high-resolution or large-area displays where precise control of scan signals is critical for maintaining image quality and efficiency. The invention aims to enhance display performance by optimizing scan signal distribution without requiring significant changes to the display panel structure.
9. The display device of claim 7 , wherein, when the display device is driven in the second mode, k (k is a natural number of 3 or more) scan signals are supplied to each of the second scan lines, and I (I is a natural number smaller than k) scan signals are supplied to each of the first scan lines and the third scan lines.
This invention relates to a display device with multiple scan line configurations to improve display performance. The device includes a display panel with first, second, and third scan lines arranged in a specific pattern. The first and third scan lines are connected to a first scan driver, while the second scan lines are connected to a second scan driver. The display device operates in at least two modes. In a first mode, scan signals are supplied to all scan lines in a conventional manner. In a second mode, the device enhances display quality by supplying k scan signals (where k is a natural number of 3 or more) to each second scan line, while supplying only I scan signals (where I is a natural number smaller than k) to each first and third scan line. This selective distribution of scan signals optimizes the display's refresh rate and power efficiency, particularly in applications requiring high-resolution or high-refresh-rate displays. The invention addresses challenges in balancing power consumption and display performance by dynamically adjusting scan signal distribution based on operational requirements. The second scan driver may include a shift register with multiple stages to generate the additional scan signals for the second scan lines, ensuring precise timing and synchronization. The first scan driver may also include a shift register with multiple stages to generate scan signals for the first and third scan lines. The display panel may be an organic light-emitting diode (OLED) display or other types of displays requiring controlled scan signal distribution.
10. The display device of claim 9 , wherein at least one scan signal supplied to the first scan lines and the third scan lines is set to have a width narrower than that of the scan signal supplied to the second scan lines.
This invention relates to display devices, specifically addressing the issue of improving display performance by optimizing scan signal timing. The device includes a display panel with multiple scan lines divided into at least three groups: first scan lines, second scan lines, and third scan lines. The scan signals supplied to the first and third scan lines are configured to have a narrower pulse width compared to the scan signals supplied to the second scan lines. This differential timing adjustment helps reduce power consumption and improve display uniformity by balancing the charging and discharging times of the pixels connected to these scan lines. The display panel may also include data lines intersecting the scan lines, with pixel circuits at the intersections. The pixel circuits may include switching elements, such as thin-film transistors, that control the electrical connection between the data lines and pixel electrodes based on the scan signals. The scan driver circuit generates the scan signals with the specified pulse widths and supplies them to the respective scan lines. The data driver circuit provides data signals to the data lines, which are then transferred to the pixel electrodes when the corresponding scan lines are activated. This design ensures efficient signal transmission and reduces potential signal interference, enhancing overall display quality.
11. The display device of claim 3 , wherein, when the display device is driven in the second mode, the timing controller is configured to supply the second start signal and then to supply the first start signal and the third start signal at the same time.
A display device includes a timing controller that operates in multiple modes to control the timing of signals for driving the display. The device addresses the challenge of optimizing display performance by dynamically adjusting signal timing to improve efficiency and reduce power consumption. In a first mode, the timing controller generates a first start signal to initiate a display operation. In a second mode, the timing controller first supplies a second start signal, followed by the simultaneous supply of the first start signal and a third start signal. This staggered and synchronized signal delivery enhances display responsiveness and reduces latency by ensuring that critical operations are triggered in an optimized sequence. The timing controller also generates a clock signal and a data signal to control the display's pixel data processing and output. The device may include a gate driver and a data driver, which receive the timing signals to synchronize the display's scanning and data writing operations. The second mode of operation is particularly useful for applications requiring rapid updates or high refresh rates, as it minimizes delays between signal transitions. The invention improves display efficiency by coordinating signal timing to avoid conflicts and ensure smooth operation.
12. The display device of claim 11 , wherein the second start signal is set to have a width wider than that of each of the first start signal and the third start signal.
This invention relates to display devices, specifically addressing the challenge of optimizing signal timing to improve display performance. The device includes a display panel with a plurality of pixels arranged in rows and columns, where each pixel is controlled by a gate line and a data line. The display device generates and transmits start signals to control the scanning of the gate lines, ensuring proper pixel activation and data writing. The invention focuses on the timing of these start signals, particularly the second start signal, which is designed to have a wider pulse width compared to the first and third start signals. This wider pulse width compensates for variations in signal propagation delays across the display panel, ensuring uniform and reliable pixel charging. The first and third start signals have narrower pulse widths, allowing for faster scanning in regions where signal delays are less critical. By adjusting the pulse widths of the start signals, the display device achieves improved display uniformity, reduced power consumption, and enhanced image quality. The invention is particularly useful in large-area displays where signal propagation delays can significantly impact performance.
13. The display device of claim 1 , further comprising: a first emission driver configured to supply an emission control signal to first emission control lines coupled to the first pixels; and a second emission driver configured to supply an emission control signal to second emission control lines coupled to the second pixels and third emission control lines coupled to the third pixels.
The invention relates to display devices, specifically those with multiple types of pixels requiring different emission control signals. The problem addressed is efficiently managing emission control in displays with pixels that have varying emission characteristics, such as different subpixel structures or driving schemes. Traditional display drivers often require separate emission control lines for each pixel type, increasing complexity and power consumption. The display device includes a first emission driver that supplies an emission control signal to first emission control lines connected to first pixels. A second emission driver supplies emission control signals to both second emission control lines connected to second pixels and third emission control lines connected to third pixels. This configuration allows the second emission driver to control emission for multiple pixel types, reducing the number of required drivers and simplifying the display architecture. The first and second emission drivers operate independently, enabling precise control over emission timing for different pixel groups. This approach is particularly useful in displays with mixed pixel types, such as those combining standard RGB pixels with additional subpixels like white or quantum dot pixels, where emission timing may differ. The invention improves efficiency by consolidating emission control functions while maintaining independent control over different pixel groups.
14. The display device of claim 13 , further comprising a timing controller configured to supply a first emission start signal to the first emission driver and supply a second emission start signal to the second emission driver.
The invention relates to display devices, specifically those with multiple emission drivers for controlling light emission in display panels. The problem addressed is the need for precise timing control of light emission in displays to improve image quality and reduce power consumption. The display device includes a display panel with a plurality of pixels, a first emission driver, and a second emission driver. The first emission driver controls light emission in a first portion of the display panel, while the second emission driver controls light emission in a second portion of the display panel. The timing controller supplies a first emission start signal to the first emission driver and a second emission start signal to the second emission driver. This allows independent control of emission timing in different regions of the display, enabling features such as local dimming, dynamic backlight adjustment, or staggered emission for power efficiency. The timing controller ensures synchronized or staggered emission timing based on the display's requirements, improving overall performance and reducing power consumption. The invention is particularly useful in high-resolution or high-dynamic-range displays where precise emission control is critical.
15. The display device of claim 14 , wherein, when the display device is driven in the first mode, the first emission driver and the second emission driver are configured to sequentially supply the emission control signal to the first emission control lines, the second emission control lines, and the third emission control lines.
This invention relates to display devices, specifically addressing the challenge of improving emission control in display panels to enhance image quality and reduce power consumption. The display device includes a display panel with a plurality of pixels arranged in rows and columns, where each pixel is connected to a first emission control line, a second emission control line, and a third emission control line. The device also includes a first emission driver and a second emission driver, each configured to supply an emission control signal to the emission control lines. The display device operates in at least two modes: a first mode for normal display operation and a second mode for low-power or standby operation. In the first mode, the first and second emission drivers are configured to sequentially supply the emission control signal to the first, second, and third emission control lines, ensuring precise timing and synchronization of emission control across the display panel. This sequential control allows for efficient light emission management, reducing flicker and improving power efficiency. The second mode may involve disabling or reducing the emission control signal to conserve power. The invention aims to optimize emission control in display devices, particularly in applications requiring high dynamic range or low-power operation.
16. The display device of claim 14 , wherein, when the display device is driven in the first mode, the timing controller is configured to sequentially supply the first emission start signal and the second emission start signal.
A display device includes a timing controller and a pixel circuit. The timing controller generates a first emission start signal and a second emission start signal to control light emission in the pixel circuit. The pixel circuit includes a driving transistor, a light-emitting element, and a plurality of switches. The switches are configured to control current flow through the driving transistor and the light-emitting element based on the first and second emission start signals. The timing controller can operate in a first mode where the first and second emission start signals are sequentially supplied to the pixel circuit. This sequential supply allows for precise control of the light emission timing, improving display performance. The pixel circuit may also include a storage capacitor to maintain a voltage level during operation. The display device can be used in applications requiring high-resolution or high-refresh-rate displays, such as smartphones, tablets, or virtual reality headsets. The sequential emission control reduces power consumption and enhances image quality by minimizing flicker and improving grayscale accuracy. The timing controller may also adjust the timing of the emission start signals based on external input or internal conditions to optimize display performance.
17. The display device of claim 14 , wherein, when the display device is driven in the second mode, the second emission driver is configured to sequentially supply an emission control signal to the second emission control lines and the third emission control lines, and the first emission driver is configured to sequentially supply an emission control signal to the first emission control lines to overlap with the emission control signal supplied to the third emission control lines.
This invention relates to display devices, specifically organic light-emitting diode (OLED) displays, addressing the challenge of improving emission control efficiency and reducing power consumption. The display device includes multiple emission control lines divided into at least three groups: first, second, and third emission control lines. Each group is driven by a dedicated emission driver. In a first mode, the emission drivers operate independently, supplying emission control signals to their respective lines without overlap. In a second mode, the second emission driver sequentially supplies emission control signals to the second and third emission control lines, while the first emission driver simultaneously supplies emission control signals to the first emission control lines. This overlapping signal supply ensures that emission control signals to the first and third lines occur concurrently, optimizing the timing and reducing power loss. The overlapping operation in the second mode enhances display performance by minimizing unnecessary power dissipation and improving the efficiency of light emission control. The invention is particularly useful in high-resolution or high-refresh-rate displays where precise emission timing is critical.
18. The display device of claim 14 , wherein, when the display device is driven in the second mode, the timing controller is configured to sequentially supply the second emission start signal and the first emission start signal.
A display device includes a timing controller and a pixel circuit. The timing controller generates emission start signals to control light emission from pixels. The pixel circuit includes a driving transistor, a light-emitting element, and a storage capacitor. The driving transistor supplies current to the light-emitting element based on a data voltage. The storage capacitor stores a voltage to maintain the driving transistor's gate-source voltage. The display device operates in a first mode and a second mode. In the first mode, the timing controller supplies a first emission start signal to enable light emission in a first group of pixels. In the second mode, the timing controller sequentially supplies a second emission start signal and the first emission start signal. The second emission start signal enables light emission in a second group of pixels before the first emission start signal enables light emission in the first group. This sequential emission control reduces power consumption and improves display uniformity by staggering the emission timing of different pixel groups. The pixel circuit may include additional transistors for initializing, compensating, and emitting operations. The timing controller adjusts the emission start signals based on the operating mode to optimize performance. The display device is suitable for high-resolution displays requiring precise emission control.
19. The display device of claim 1 , wherein the first pixel region is located adjacent to a first horizontal line of the second pixel region, and the third pixel region is adjacent to the last horizontal line of the second pixel region.
This invention relates to display devices, specifically addressing the arrangement of pixel regions to improve display performance. The display device includes multiple pixel regions, including a first pixel region, a second pixel region, and a third pixel region. The first pixel region is positioned adjacent to a first horizontal line of the second pixel region, while the third pixel region is adjacent to the last horizontal line of the second pixel region. This arrangement ensures proper alignment and spacing between the pixel regions, enhancing display uniformity and reducing visual artifacts. The second pixel region is centrally located between the first and third pixel regions, forming a structured layout that optimizes pixel density and resolution. The invention may be applied in various display technologies, including LCD, OLED, and microLED, to improve image quality and viewing experience. The precise positioning of the pixel regions helps in minimizing gaps and misalignments, leading to a more consistent and high-quality display output.
20. The display device of claim 19 , further comprising a data driver configured to supply a data signal to data lines coupled to the first pixels, the second pixels, and the third pixels.
A display device includes a pixel array with first pixels, second pixels, and third pixels arranged in a specific pattern to enhance display performance. The first pixels are positioned in a first row and a first column, the second pixels are positioned in a second row and a second column, and the third pixels are positioned in a third row and a third column. The pixel arrangement ensures that each pixel type is spaced apart to reduce interference and improve color uniformity. The display device also includes a data driver that supplies data signals to data lines connected to the first, second, and third pixels. The data driver controls the voltage or current applied to each pixel to achieve precise color and brightness levels. This configuration improves image quality by minimizing crosstalk between adjacent pixels and enhancing the overall visual output. The display device is particularly useful in high-resolution applications where color accuracy and uniformity are critical. The pixel arrangement and data driver work together to provide a balanced and efficient display solution.
21. The display device of claim 20 , wherein, when the display device is driven in the second mode, the data driver is configured to supply data signals of the first horizontal line of the second pixel region to the last horizontal line of the first pixel region, and to supply data signals of the last horizontal line of the second pixel region to a first horizontal line of the third pixel region.
This invention relates to display devices, specifically addressing the challenge of improving display performance by optimizing data signal distribution across pixel regions. The display device operates in multiple modes, including a second mode where data signals are managed differently to enhance visual quality or efficiency. In this mode, a data driver supplies data signals from the first horizontal line of a second pixel region to the last horizontal line of a first pixel region. Simultaneously, the data driver supplies data signals from the last horizontal line of the second pixel region to the first horizontal line of a third pixel region. This configuration ensures seamless data flow between adjacent pixel regions, reducing artifacts or delays that may occur during transitions. The data driver's role is to manage signal distribution dynamically, ensuring that data is correctly routed to maintain display integrity. The invention improves display uniformity and responsiveness by coordinating signal delivery across multiple pixel regions, addressing issues like flicker or distortion in high-resolution or high-refresh-rate displays. The solution is particularly useful in advanced display technologies where precise signal timing and distribution are critical.
22. The display device of claim 21 , further comprising a memory configured to store first data corresponding to the first horizontal line of the second pixel region and second data corresponding to the last horizontal line of the second pixel region.
A display device includes a display panel with a first pixel region and a second pixel region, where the second pixel region is adjacent to the first pixel region. The display panel is configured to display an image by driving pixels in the first and second pixel regions. The device includes a data driver that provides data signals to the display panel, where the data signals include first data corresponding to a first horizontal line of the second pixel region and second data corresponding to a last horizontal line of the second pixel region. The device also includes a memory configured to store the first data and the second data. The memory stores these data values to facilitate efficient data processing and display operations, particularly when transitioning between different regions of the display. This configuration helps optimize data handling and reduce latency in displaying images, improving overall display performance. The stored data can be used to manage pixel driving sequences, ensure smooth transitions between regions, and enhance image quality. The memory may be integrated within the display device or connected externally, depending on the specific implementation. This approach is useful in applications requiring high-speed data processing and precise control over pixel driving, such as in high-resolution or high-refresh-rate displays.
23. The display device of claim 20 , wherein, when the display device is driven in the second mode, the data driver is configured to supply the same data signal to the first pixel region and the third pixel region.
A display device includes a display panel with multiple pixel regions, including a first pixel region, a second pixel region, and a third pixel region. The display panel is driven in either a first mode or a second mode. In the first mode, the display device operates with a first resolution, and in the second mode, it operates with a second resolution lower than the first. The display device includes a data driver that supplies data signals to the pixel regions. When operating in the second mode, the data driver provides the same data signal to the first and third pixel regions, effectively combining these regions to reduce resolution while maintaining display functionality. This configuration allows the display to switch between high-resolution and lower-resolution modes, optimizing power consumption or performance based on usage requirements. The second pixel region may receive a different data signal, enabling partial high-resolution display even in the second mode. The display device may also include a timing controller to manage signal distribution and a gate driver to control pixel activation. This design is particularly useful in applications requiring adaptive resolution, such as mobile devices or energy-efficient displays.
24. A method for driving a display device including a first pixel region, a second pixel region, and a third pixel region, which are adjacent to each other and each includes at least two scan lines, the method comprising: when the display device is driven in a first mode, sequentially supplying a scan signal to the first pixel region, the second pixel region, and the third pixel region; and when the display device is driven in a second mode different from the first mode, supplying a scan signal to the second pixel region and then supplying a scan signal to the first pixel region and the third pixel region.
This invention relates to methods for driving display devices with multiple pixel regions, each containing at least two scan lines. The problem addressed is optimizing scan signal distribution to improve display performance under different operating conditions. In a first mode, the method sequentially supplies scan signals to adjacent pixel regions in order (e.g., first, second, then third). In a second mode, the scan signal is first supplied to the middle pixel region (second region), followed by simultaneous or overlapping supply to the outer regions (first and third regions). This approach allows for flexible scan signal distribution, potentially improving power efficiency, reducing flicker, or enhancing refresh rates depending on the display's operating conditions. The method is particularly useful for displays requiring adaptive driving strategies, such as those used in high-resolution or high-refresh-rate applications. The invention ensures proper synchronization of scan signals across adjacent pixel regions while accommodating different driving modes.
25. The method of claim 24 , wherein the display device is set to the second mode when the display device is mounted in a wearable device, and is set to the first mode otherwise.
A method for dynamically adjusting display modes in electronic devices addresses the problem of optimizing display performance based on usage context. The invention involves a display device that operates in at least two distinct modes: a first mode optimized for general use and a second mode tailored for wearable devices. The display device automatically switches between these modes based on its mounting status. When the display is integrated into a wearable device, such as a smartwatch or augmented reality glasses, it activates the second mode, which may prioritize power efficiency, readability in motion, or other wearable-specific optimizations. In all other scenarios, the display defaults to the first mode, which may prioritize higher resolution, brightness, or other standard display features. The method ensures that the display adapts seamlessly to different usage environments without manual intervention, enhancing user experience and device efficiency. The invention may also include additional features, such as sensors or software logic, to detect the mounting status and trigger the mode switch. This approach is particularly useful in portable and wearable electronics where display performance must balance power consumption, usability, and environmental adaptability.
26. The method of claim 24 , wherein, when the display device is driven in the second mode, simultaneously supplying a scan signal to the first pixel region and the third pixel region.
This invention relates to display technologies, specifically methods for driving display devices with multiple pixel regions to improve performance. The problem addressed is the need for efficient and synchronized control of different pixel regions in a display to enhance image quality and reduce power consumption. The method involves driving a display device in at least two distinct modes. In a first mode, the display device operates with standard control signals applied to pixel regions. In a second mode, the method simultaneously supplies a scan signal to at least two non-adjacent pixel regions, such as a first pixel region and a third pixel region, while excluding a second pixel region between them. This selective and simultaneous activation of specific pixel regions allows for optimized display performance, such as faster refresh rates or reduced power usage. The method may also include adjusting the timing or amplitude of the scan signal to ensure proper synchronization between the activated pixel regions. The display device may be an organic light-emitting diode (OLED) display or another type of display with multiple independently controllable pixel regions. The simultaneous scan signal application in the second mode enables efficient control of pixel regions without interfering with adjacent regions, improving overall display functionality.
27. The method of claim 24 , wherein, when the display device is driven in the second mode, supplying data signals of a first horizontal line of the second pixel region to the last horizontal line of the first pixel region, and supplying data signals of the last horizontal line of the second pixel region to a first horizontal line of the third pixel region.
This invention relates to display driving techniques for improving image quality in display devices, particularly in scenarios where multiple pixel regions are driven in different modes. The problem addressed is the visual artifacts that can occur at the boundaries between pixel regions when transitioning between different display modes, such as switching between high-resolution and low-resolution regions or between different refresh rates. These artifacts arise due to mismatched data signal timing and synchronization between adjacent pixel regions, leading to visible discontinuities or flickering. The invention provides a method for driving a display device with at least three pixel regions, where the display is operated in a first mode for the first and third pixel regions and a second mode for the second pixel region. To mitigate boundary artifacts, the method involves supplying data signals from the first horizontal line of the second pixel region to the last horizontal line of the first pixel region, and supplying data signals from the last horizontal line of the second pixel region to the first horizontal line of the third pixel region. This overlapping signal distribution ensures smooth transitions between the pixel regions by maintaining signal continuity at their boundaries. The technique is particularly useful in displays with mixed-mode operation, such as those incorporating high-resolution and low-resolution sections or regions with different refresh rates, where seamless transitions are critical for visual quality. The method helps eliminate visible seams or distortions that would otherwise occur due to abrupt changes in signal timing between adjacent pixel regions.
28. The method of claim 24 , wherein, when the display device is driven in the second mode, displaying the same image in the first pixel region and the third pixel region.
A method for driving a display device with multiple pixel regions to improve image quality involves operating the device in at least two distinct modes. In one mode, the display device is configured to display the same image content in a first pixel region and a third pixel region, which are spatially separated. This approach helps mitigate visual artifacts, such as color shifts or brightness inconsistencies, that may arise due to differences in pixel characteristics or environmental factors like ambient light. The method ensures uniform image presentation across different regions of the display, enhancing viewing experience. The technique is particularly useful in high-resolution or high-dynamic-range displays where pixel-level control is critical. By synchronizing image output in the specified regions, the method compensates for potential discrepancies in pixel performance, such as variations in subpixel response or manufacturing defects. The solution is applicable to various display technologies, including LCD, OLED, and microLED, where maintaining consistent image quality is essential. The method may also involve adjusting driving signals or compensation algorithms to further optimize display performance.
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November 24, 2020
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